CHAPTER 3 CPU
Figure 3.4-4 shows the relationship between the memory space divisions and each register.
See "3.7.9 Bank Registers (PCB, DTB, USB, SSB, ADB)", for details.
FFFFFF
FF0000
0FFFFF
0F0000
0DFFFF
0D0000
0BFFFF
0B0000
7FFFFF
070000
000000
■ Bank Addressing and Default Space
To improve instruction coding efficiency, each instruction has a defined default space for each addressing
method, as shown in Table 3.4-2. To use a space other than the default space, specify a prefix code for a
bank before the instruction. This enables the bank space that corresponds to the specified prefix code to be
accessed. See "3.9 Prefix Codes", for details about prefix codes.
Table 3.4-2 Addressing and Default Spaces
Default space
Program space
Data space
Stack space
Additional space
36
Figure 3.4-4 Sample Bank Addressing
H
Program space
H
H
Additional space
H
H
User stack space
H
H
Data space
H
H
System stack space
H
H
PC indirect, program access, branching
Addressing using @RW0, @RW1, @RW4, and @RW5, @A, addr16, dir
Addressing using PUSHW, POPW, @RW3, and @RW7
Addressing using @RW2 and @RW6
: PCB (Program Bank Register)
FF
H
: ADB (Additional Bank Register)
0F
H
: USB (User Stack Bank Register)
0D
H
: DTB (Data Bank Register)
0B
H
: SSB (System Stack Bank Register)
07
H
Addressing