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INDEX
Processing Specifications of Sample Program for
Extended Intelligent I/O Service (EI
.......................................................... 153
External Clock
Baud Rates determined using the External Clock
.......................................................... 497
Connection of an Oscillator or an External Clock to the
Microcontroller ..................................... 87
Event Count Mode (External Clock Mode) ......... 231
External Count Clock
External Count Clock Selected .......................... 331
External Interrupt
External Interrupt Function ............................... 528
Sample Program for the External Interrupt Function
.......................................................... 532
External Reset
Block Diagrams of the External Reset Pin ............ 69
F
2
F
MC-16LX Instruction List
2
MC-16LX Instruction List ............................. 660
F
Fetch
Mode Fetch........................................................ 72
Flag
Hardware Sequence Flag................................... 593
Flag Change Suppression Prefix
Flag Change Suppression Prefix (NCC)................ 61
Flash Memory
Characteristics of the 512K/1024K Bit Flash Memory
.......................................................... 588
Detailed Explanation on the Flash Memory Write/
Delete ................................................ 600
Procedure for Writing/Deleting the data to the Flash
Memory ............................................. 588
Procedure of Writing the Data to the Flash Memory
.......................................................... 602
Programming Example Using 512K Bit Flash
Memory ............................................. 610
Register on the Flash Memory ........................... 588
Flash Microcontroller Programmer
Example of Minimum Connection with Flash
Microcontroller Programmer (when Power
Supplied by User)................................ 622
Example of Minimum Connection with Flash
Microcontroller Programmer (when Power
Supplied from Writer).......................... 624
Flash Security
Flash Security Feature ...................................... 609
Flowchart
Flowchart of Pulse-width Measurement Operation
.......................................................... 460
Flowchart of Timer Mode Operation .................. 455
704
FMCS
2
Control Status Register (FMCS) ........................ 590
OS)
FPT-64P-M06
FPT-64P-M06 Package Dimensions .................... 12
FPT-64P-M06 Pin Assignment.............................. 8
FPT-64P-M09
FPT-64P-M09 Package Dimensions .................... 13
FPT-64P-M09 Pin Assignment.............................. 9
Free-run TImer
Block Diagram of 16-bit Free-run TImer............ 283
Free-run Timer
16-bit Free-run Timer ( 1) ................................. 280
16-bit Free-run Timer Interrupts ........................ 320
16-bit Free-run Timer Interrupts and EI
16-bit Free-run Timer Registers......................... 289
Sample Program for 16-bit Free-run Timer......... 351
Usage Notes on the 16-bit Free-run Timer .......... 349
Fujitsu Standard
Standard Configuration for Fujitsu Standard Serial
G
GATE
Output Condition of RTO0 to RTO5 and GATE
Gate
Gate Triggered PPG0 Output ............................ 340
GATE Signal
Generating GATE Signal during Each RTx is at "H"
Generating GATE Signal from Rising Edge of Each
Gate Trigger
Gate Trigger (PPG channel 0 only) .................... 275
General-purpose Register
Configuration of a General-purpose Register ........ 55
General-purpose Register Area and Register Bank
General-purpose Registers
Dedicated Registers and General-purpose Registers
GTENx
Generating GATE Signal during Each RTx is at "H"
Generating GATE Signal from Rising Edge of Each
On-board Writing................................ 616
......................................................... 339
Level when GTENx is active (DTCR0/
DTCR1/DTCR2:TMD2 to TMD0=001
) ................................................. 340
111
B
RTx until 16-bit Timer 0/1/2 Underflow
when GTENx is active (DTCR0/DTCR1/
DTCR2:TMD2 to TMD0=010
Pointer ................................................. 50
........................................................... 39
Level when GTENx is active (DTCR0/
DTCR1/DTCR2:TMD2 to TMD0=001
111
) ................................................. 340
B
RTx until 16-bit Timer 0/1/2 Underflow
when GTENx is active (DTCR0/DTCR1/
DTCR2:TMD2 to TMD0=010
2
OS........ 320
or
B
) .......... 341
B
or
B
) .......... 341
B
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