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CHAPTER 14 MULTI-FUNCTIONAL TIMER
14.1
Overview of Multi-functional Timer
The multi-functional timer consists of a 16-bit free-run timer, six 16-bit output compare,
four 16-bit input capture, 1 channel of 16-bit PPG timer and a waveform generator. By
using this waveform generator, 12 independent waveform can be outputted through 16-
bit free-run timer. Furthermore input pulse width measurement and external clock cycle
measurement can be done.
■ 16-bit Free-run Timer (× 1)
• The 16-bit free-run timer consists of a 16-bit up/up-down counter, control register, 16-bit compare clear
register (with buffer register) and a prescaler.
• 8 types of counter operation clock (φ, φ/2, φ/4, φ/8, φ/16, φ/32, φ/64, φ/128) can be selected (φ is the
machine clock).
• Compare clear interrupt is generated when there is a compare match with compare clear register and 16-
bit free-run timer. Zero detection interrupt is generated while 16-bit free-run timer is detected as zero in
count value.
• The compare clear register has a selectable buffer register, into which data is written for transfer to the
compare clear register. When the timer is stopped, transfer occurs immediately when the data is written
to the buffer. When the timer is operation, data transfer from the buffer occurs when the timer value is
detected to be zero.
• Reset, software clear, compare match with compare clear register in up-count mode will reset the
counter value to "0000
• The output value of this counter can be used as the count clock of the output compares and input
captures in multi-functional timer.
■ 16-bit Output Compare (× 6)
• The output compare consists of six 16-bit compare registers (with selectable buffer register), compare
output latch and compare control registers. An interrupt is generated and output level is inverted when
the value of 16-bit free-run timer and compare register are matched.
• 6 compare registers can be operated independently.
Output pins and interrupt flag are corresponding to each compare register.
• 2 compare registers can be paired to control the output pins.
Inverts output pins by using 2 compare registers together.
• Setting the initial value for each output pin is possible.
• An interrupt is generated when output compare register is matched with 16-bit free-run timer.
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