Fujitsu MB90460 Series Hardware Manual page 513

CHAPTER 17 UART
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Internal timer
When CS2 to CS0 are set to "110
rates (when using the reload timer) are as follows:
Asynchronous (start-stop synchronization): ( φ÷ N) / (16 × 2 × (n + 1))
CLK synchronization: ( φ÷N) / (2 × (n + 1))
N: Division ratio for the prescaler of 16-bit re-load timer count clock
n: reload value of the 16-bit reload timer
Note:
In mode 2 (CLK synchronization mode), SCK0/SCK1 is up to three clocks later than SCKI. A
logically attainable transfer rate is 1/3 of the system clock frequency. However, 1/4 of the system
clock frequency is recommended as taken from the actual specifications.
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External clock
When CS2 to CS0 are set to "111
If the external clock frequency is specified as f, the following baud rates are assumed:
Asynchronous (start-stop synchronization): f/16
CLK synchronization: f
Note that the maximum external clock frequency f is 2 MHz.
494
" and the internal timer is selected, the formulas for calculating baud
B
" and the external clock is selected, note the following:
B