Fujitsu MB90460 Series Hardware Manual page 153

CHAPTER 7 INTERRUPT
Main program
Peripheral initialization
A/D interrupt generated
Main processing restarts
(1) A/D interrupt generated
When the A/D converter interrupt processing starts, the interrupt level mask register (ILM)
automatically has the same value (2 in the example) as the A/D converter interrupt level (ICR: IL2 to
IL0).
If a level-1 or level-0 interrupt request is generated, this interrupt processing has priority.
(2) Interrupt processing terminated
When the interrupt processing terminates and the return instruction (RETI) is executed, the values of the
dedicated registers (A, DPR, ADB, DTB, PCB, PC and PS) are returned from the stack, and the interrupt
level mask register (ILM) has the value that it had before the interrupt.
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Figure 7.4-5 Example of Multiple Interrupts
A/D interrupt processing
Interrupt level 2
(ILM = 010)
Timer interrupt
generated
Interrupted
Restart
A/D interrupt
processing
A/D interrupt return
Timer interrupt processing
Interrupt level 1
(ILM = 001)
Timer interrupt processing
Timer interrupt return