Fujitsu MB90460 Series Hardware Manual page 18

F2mc-16lx 16-bit microcontroller
Table of Contents

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Main changes in this edition
Page
CHAPTER 5 CLOCK
83
5.3 Clock Selection Register (CKSCR)
CHAPTER 6
106
LOW POWER CONSUMPTION MODE
6.6 State Change Diagram
CHAPTER 6
LOW POWER CONSUMPTION MODE
109
6.7 State of Pins in Standby Mode and during
Reset
CHAPTER 7 INTERRUPT
123
7.3.2 Interrupt Control Register Functions
CHAPTER 12 16-BIT RELOAD TIMER
230
12.1 Overview of the 16-bit Reload Timer
CHAPTER 12 16-BIT RELOAD TIMER
253
12.8 Sample Programs for the 16-bit Reload
Timer
CHAPTER 14
MULTI-FUNCTIONAL TIMER
298
14.4.3 Timer Control Status Register
(TCCSH, TCCSL)
CHAPTER 18
521
DTP/EXTERNAL INTERRUPT CIRCUIT
18.4.1 DTP/interrupt Cause Register (EIRR)
CHAPTER 18
522
DTP/EXTERNAL INTERRUPT CIRCUIT
18.4.2 DTP/interrupt Enable Register (ENIR)
CHAPTER 18
DTP/EXTERNAL INTERRUPT CIRCUIT
525
18.5 Operation of the DTP/External Interrupt
Circuit
CHAPTER 18
DTP/EXTERNAL INTERRUPT CIRCUIT
530
18.6 Usage Notes on the DTP/External
Interrupt Circuit
CHAPTER 20 8/10-BIT A/D CONVERTER
552
20.4.2 A/D Control Status Register 0 (ADCS0)
Section
-
Change Results
The product name is changed to "MB90460/465 series".
The function column of bit 14 in Table 5.3-1 is changed.
·
("
Writing has no effect on the operation." is added.)
Figure 6.6-1 is changed.
"*3" under Table 6.7-1 is changed.
The summary is changed.
"● External trigger operation" is changed.
"● Coding example" is changed.
The function column of bit 3 in Table 14.4-2 is changed.
·
("
Even after "1" is written, the counter value is not initialized
if "0" is written to this bit before the next count clock." is
added.)
"■ DTP/interrupt Cause Register (EIRR)" is changed.
("Notes:" is added.)
"■ DTP/interrupt Enable Register (ENIR)" is changed.
("Note:" is added.)
"■ Setting the DTP/external Interrupt Circuit" is changed.
("1. Set as an input port the general I/O port to be used also as
a pin to input external interrupts." is added.)
"● Input polarities of external interrupts" is changed.
("If the request input level is level setting, the pulse width
requires a longer period than the minimum pulse width stated
on the data sheet. Also, as long as the interrupt input pin
retains the active level, interrupt requests continue to be
generated to the interrupt controller, even if the DTP/external
interrupt cause register is cleared." is added.)
The function column of bit5 to bit3 in Table 20.4-2 is changed.
("Notes:" is added.)
xiii

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