Fujitsu MB90460 Series Hardware Manual page 203

CHAPTER 9 I/O PORT
■ Block Diagram of Port 3 Pins
Figure 9.6-1 is a block diagram of port 3 pins.
Port data register (PDR)
PDR read
PDR write
Port data direction register (DDR)
DDR write
DDR read
When the resource output enable bit is set, the port is forcibly caused to function as resource output pins
regardless of the value in the DDR3 register.
■ Port 3 Registers
Port 3 registers are PDR3 and DDR3. The bits making up each register correspond to the port 3 pins on a
one-to-one basis. Table 9.6-2 lists the port 3 pins and their corresponding register bits.
Table 9.6-2 Port 3 pins and their Corresponding Register Bits
Port
PDR3, DDR3
Port 3
Corresponding pin
184
Figure 9.6-1 Block Diagram of Port 3 Pins
Output latch
Direction latch
Register bits and corresponding port pins
bit15 bit14
P37 P36
Resource output
Resource output enable
Standby control (SPL = 1)
bit13 bit12 bit11
P35 P34 P33
Pin
bit10 bit9 bit8
P32 P31 P30