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CHAPTER 12 16-BIT RELOAD TIMER
12.6.2
Internal Clock Mode (single-shot mode)
Synchronized with the internal count clock, the 16-bit reload timer is used for counting
down of the 16-bit counter, generating an interrupt request to the CPU for a counter
underflow. It can also output from the TO pin a rectangular waveform indicating that
counting is in progress.
■ Internal Clock Mode (Single-shot Mode)
When counting is enabled (TMCSRL0/TMCSRL1:CNTE = 1) and the timer is started with the software
trigger bit (TMCSRL0/TMCSRL1:TRG) or external trigger, counting starts. If the count enable bit and
software trigger bit are set to "1" simultaneously, counting starts simultaneously with the enabling of
counting. When an underflow of the counter value (from 0000
FFFF
state. If the underflow interrupt flag (TMCSRL0/TMCSRL1:UF) bit is set to "1" and the underflow
H
interrupt enable (TMCSRL0/TMCSRL1:INTE) bit is "1", an interrupt request is generated.
The timer can also output from the TO0/TO1 pin a rectangular waveform indicating that counting is in
progress.
●
Software trigger operation
When "1" is written to the TRG bit of the timer control status register (TMCSRL0/TMCSRL1), the counter
is started. Figure 12.6-7 shows the software trigger operation in single-shot mode.
Figure 12.6-7 Count Operation in Single-shot Mode (Software Trigger Operation)
Count clock
Counter
Data load signal
CNTE bit
TRG bit
T: Machine cycle
* It takes 1T time from trigger input to loading of the reload data.
248
Reload data
UF bit
TO pin
H
Reload data
Wait for trigger input
to FFFF
) occurs, the counter stops in the
H
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