Fujitsu MB90460 Series Hardware Manual page 571

F2mc-16lx 16-bit microcontroller
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CHAPTER 20 8/10-BIT A/D CONVERTER
Table 20.4-2 A/D Control Status Register 0 (ADCS0)
Bit name
MD1, MD0:
bit7,
A/D conversion
bit6
mode select bits
bit5
ANS2 to ANS0:
to
A/D conversion start
bit3
channel select bits
552
• These bits select the conversion mode of the A/D conversion function.
• The two-bit value of the MD1 and MD0 bits determines the mode that is selected
from among four modes: single conversion mode 1, single conversion mode 2,
continuous conversion mode, and stop conversion mode.
• The operation in each mode is described below:
Single conversion mode 1:
Just a single A/D conversion from the channel set by ANS2 to ANS0 to the channel
set by ANE2 to ANE0 is performed.
Reactivation during operation is allowed.
Single conversion mode 2:
Just a single A/D conversion from the channel set by ANS2 to ANS0 to the channel
set by ANE2 to ANE0 is performed.
Reactivation during operation is not allowed.
Continuous conversion mode:
A/D conversion from the channel set by ANS2 to ANS0 to the channel set by ANE2
to ANE0 is performed repeatedly. The repeated conversion continues until it is
stopped by the BUSY bit.
Reactivation during operation is not allowed.
Stop conversion mode:
A/D conversion from the channel set by ANS2 to ANS0 to the channel set by ANE2
to ANE0 is performed repeatedly with a pause after the conversion of each channel.
The repeated conversion continues until it is stopped by the BUSY bit.
Reactivation during operation is not allowed. In the pause state, the conversion is
reactivated when an activation cause selected by the STS1 and STS0 bits is
generated.
(Note)
In the single conversion modes, continuous conversion mode, and stop conversion
mode, no reactivation by a timer, external trigger, or software is allowed.
• These bits set the A/D conversion start channel and indicate the number of the
current conversion channel.
• When activated, A/D conversion starts from the channel specified by these bits.
• During A/D conversion, the bits indicate the number of the current conversion
channel. During a pause in stop conversion mode, the bits indicate the number of
the last conversion channel.
• As for the lead value of this bit, even when the value is set to this bit, not the set
value but the channel number in which A/D was converted last time is read until the
analog to digital conversion is begun.
• At the reset, the bit is initialized to "000
(Notes)
• Do not use a read-modify-write instruction to set the sampling time setting bits
(ST1, ST0), comparison time setting bits (CT1, CT0), or A/D conversion end
channel select bits (ANE2, ANE1, ANE0) after setting the A/D conversion start
channel select bits (ANS2, ANS1, ANS0).
• As for ANS2, ANS1 and ANS0, the last conversion channel is read until A/D
conversion starts. Therefore, if a read-modify-write instruction is used to set the
ST1, ST0 bits, the CT1, CT0 bits, and the ANE2, ANE1 and ANE0 bits after the
ANS2, ANS1 and ANS0 are set, the value of ANS2, ANS1 and ANS0 may be
rewritten.
Function
".
B

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