Processing For Interrupt Operation - Fujitsu MB90460 Series Hardware Manual

7.4.2

Processing for Interrupt Operation

When an interrupt request is generated by the peripheral function, the interrupt
controller transmits the interrupt level to the CPU. If the CPU is able to accept interrupt,
the interrupt controller temporarily interrupts the instruction currently being executed.
The interrupt controller then executes the interrupt processing routine or activates the
extended intelligent I/O service (EI
If a software interrupt is generated by the INT instruction, the interrupt processing
routine is executed regardless of the CPU status. In this case, hardware interrupt is not
allowed.
■ Processing for Interrupt Operation
Figure 7.4-3 shows the flow of processing for interrupt operation.
String type*
instruction in
progress
Fetch the next instruction
and deode
Execute ordinary instruction
(including interrupt processing)
NO
Move the pointer to the next
instruction by PC update
*: When a string type instruction is being executed, the interrupt is evaluated in each step.
I: Interrupt enable flag of the condition code register (CCR)
IF: Interrupt request flag of the peripheral function
IE: Interrupt enable flag of the peripheral function
ILM: Interrupt level mask register (in the PS)
ISE: EI²OS enbale flag ofthe interruptor control register (ICR)
IL: Interrupt level setting bit of the interrupt control register (ICR)
2
OS).
Figure 7.4-3 Flow of Interrupt Processing
START
Main program
YES
I&IF&IF=1
AND
LM>IL
YES
INT
instruction?
NO Save the dedicated registers
to the system stack
I <- 0 (Disable hardware
interrupts)
YES
RETI
instruction?
NO Return the dedicated
registers from the system
stack, call the interrupt
routine, and return to the
previous routine
Repetition
of string type* instruction
completed?
YES
Interrupt activation/return processing
ISE = 1
NO
Software inter-
rupt/exception
processing
Hardware
instruction
YES
Save the dedicated
registers to the system stack
ILM <- IL (Transfer the
interrupt level of the accepted
interrupt request to the ILM)
Return
S <- 1 (Activates the
processing
system stack)
PCB, PC <- interrupt
vector (Branch to the
interrupt processing routine)
S: Stack flag of the condition code register (CCR)
PCB: Program bank register
PC: Program counter:
CHAPTER 7 INTERRUPT
YES
2
EI OS
EI 2 OS processing
Specified
count terminated? Alter-
natively, is there a termination
request from the peripheral
function?
NO
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