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Table 21.3-2 Program Address Detection Control Status Register
Bit name
bit7
to
Reserved bits
bit4
AD1E:
bit3
Address detection register 1
enable bit
AD1D:
bit2
Address detection flag 1 bit
AD0E:
bit1
Address detection register 0
enable bit
AD0D:
bit0
Address detection flag 0 bit
• Always write "0" to these bits.
• ADR1 operation enable bit.
• When this bit is "1", the value set in the PADR1 register is compared with the
address. If the two values are equal, an INT9 instruction is generated and the
AD1D bit is set to "1".
• ADR1 address match detection bit.
• This bit is set to "1" to indicate that the value set in the PADR1 register
matches the address. It is cleared to "0" by writing "0" to it. It is left
unchanged by writing "1" to it.
• ADR0 operation enable bit.
• When this bit is "1", the value set in the PADR0 register is compared to the
address. If the two values are equal, an INT9 instruction is generated and the
AD0D bit is set to "1".
• ADR0 address match detection bit.
• This bit is set to "1" to indicate that the value set in the PADR0 register is
equal to the address. It is cleared to "0" by writing "0" to it. It is left
unchanged by writing "1" to it.
CHAPTER 21 ROM CORRECTION FUNCTION
Function
577
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