Fujitsu MB90460 Series Hardware Manual page 433

F2mc-16lx 16-bit microcontroller
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CHAPTER 15 MULTI-PULSE GENERATOR
The comparison for the position detection is done in pair for each SNIx pin and RDAx bit (SNI2 and
RDA2, SNI1 and RDA1, SNI0 and RDA0), a comparison match starts the 16-bit reload timer 0. The write
signal is generated by the16-bit reload timer 0 underflow.
Pin OPTx output waveform according to the effective edge input to pin SNIx is shown as in Figure 15.6-
19. The 16-bit reload timer 0 is started when the pins SNI2 to SNI0 are compared with the value of the
RDA2 to RDA0 bits and matches. Data transfer from the Output Data Buffer register (OPDBR) specified
by the RDA2 to RDA0 bits to the Output Data Register (OPDR) is triggered by the underflow of the 16-bit
reload timer 0. The operation of output data is renewed automatically.
In order to use this method, the reload timer should be used in " Single Shot Mode". TIN0O must be longer
than two machine cycles.
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