Port 3 Registers (Pdr3 And Ddr3) - Fujitsu MB90460 Series Hardware Manual

9.6.1

Port 3 Registers (PDR3 and DDR3)

This section describes the port 3 registers.
■ Functions of Port 3 Registers
●
Port 3 data register (PDR3)
The PDR3 register indicates the state of each pin of port 3.
●
Port 3 data direction register (DDR3)
The DDR3 register specifies the direction of a data flow (input or output) at each pin (bit) of port 3. When
a DDR3 register bit is "1", the corresponding port (pin) is set as an output port. When the bit is "0", the
port (pin) is set as an input port.
Note:
When a resource having output pins is used, the port functions as resource output pins regardless of
the value in the DDR3 register as long as the resource output enable bit corresponding to the pins is
set.
Table 9.6-3 lists the functions of the port 3 registers.
Table 9.6-3 Port 3 Register Functions
Register Data
0
Port 3 data
register (PDR3)
1
0
Port 3 data
direction
register (DDR3)
1
R/W: Read/write enabled
X : Undefined
During
During writing
reading
The pin is The output latch is loaded with "0".
at the low When the pin functions as an output
level. port, the pin is set to the low level.
The pin is The output latch is loaded with "1".
at the high When the pin functions as an output
level. port, the pin is set to the high level.
The
The output buffer is turned off to
direction
place the port in input mode.
latch is "0".
The
The output buffer is turned on to
direction
place the port in output mode.
latch is "1".
CHAPTER 9 I/O PORT
Read/
Address Initial value
Write
000003 XXXXXXXX
R/W
H
000013
R/W
H
B
00000000
B
185