Fujitsu MB90460 Series Hardware Manual page 401

CHAPTER 15 MULTI-PULSE GENERATOR
■ Output Data Buffer Lower Register (OPDBR)
Address bit 7
003FF6
H
OP31 OP30
to 003FE0
H
R/W R/W
X : Indeterminate
R/W : Readable and writable
: Initial value
— : Not used
382
Figure 15.4-7 Output Data Buffer Lower Register (OPDBR)
6 5 4 3
OP21 OP20 OP11
R/W R/W R/W
2 1 0 Initial value
OP10 OP01 OP00 00000000
R/W R/W R/W
OP01 OP00
0 0
0 1
1 0
1 1
OP11 OP10
0 0
0 1
1 0
1 1
OP21 OP20
0 0
0 1
1 0
1 1
OP31 OP30
0 0
0 1
1 0
1 1
B
OPT0 output waveform selection bits
Setting for OPT0 pin to output "L" level.
Setting for OPT0 pin to output the output
of the PPG timer.
Setting for OPT0 pin to output the
inverted output of the PPG timer.
Setting for OPT0 pin to output "H" level.
OPT1 output waveform selection bits
Setting for OPT1 pin to output "L" level.
Setting for OPT1 pin to output the output
of the PPG timer.
Setting for OPT1 pin to output the
inverted output of the PPG timer.
Setting for OPT1 pin to output "H" level.
OPT2 output waveform selection bits
Setting for OPT2 pin to output "L" level.
Setting for OPT2 pin to output the output
of the PPG timer.
Setting for OPT2 pin to output the
inverted output of the PPG timer.
Setting for OPT2 pin to output "H" level.
OPT3 output waveform selection bits
Setting for OPT3 pin to output "L" level.
Setting for OPT3 pin to output the output
of the PPG timer.
Setting for OPT3 pin to output the
inverted output of the PPG timer.
Setting for OPT3 pin to output "H" level.