Usage Notes On The 16-Bit Reload Timer - Fujitsu MB90460 Series Hardware Manual

CHAPTER 12 16-BIT RELOAD TIMER
12.7

Usage Notes on the 16-bit Reload Timer

Notes on using the 16-bit reload timer are given below.
■ Usage Notes on the 16-bit Reload Timer
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Notes on using a program for setting
• Write a value to the 16-bit reload register (TMRD0/TMRD1) when counting stops (TMCSRL0/
TMCSRL1:CNTE = 0). Also, a value can be read from the 16-bit timer register (TMR0/TMR1) even
during counting, but always be sure to use a word transfer instruction (MOVW A, dir, etc.).
• Change the CSL1 and CSL0 bits of the timer control status register (TMCSRH0/TMCSRH1) when the
counter has stopped (TMCSRL0/TMCSRL1:CNTE = 0).
●
Notes about interrupts
• When the UF bit of the timer control status register (TMCSRL0/TMCSRL1) is set to "1" and an
interrupt request is enabled (TMCSRL0/TMCSRL1:INTE = 1), control cannot be returned from
interrupt processing. Always clear the UF bit.
• Since the 16-bit reload timer shares an interrupt vector with other resource, interrupt causes must be
checked carefully by the interrupt processing routine when interrupts are used.
Also, when EI
252
2
OS is used by the 16-bit reload timer, shared resource interrupts must be disabled.