RM0402
PCM standard
For the PCM standard, there is no need to use channel-side information. The two PCM
modes (short and long frame) are available and configurable using the PCMSYNC bit in
SPIx_I2SCFGR register.
short frame
For long frame synchronization, the WS signal assertion time is fixed to 13 bits in master
mode.
For short frame synchronization, the WS synchronization signal is only one cycle long.
Figure 301. PCM standard waveforms (16-bit extended to 32-bit packet frame)
Note:
For both modes (master and slave) and for both synchronizations (short and long), the
number of bits between two consecutive pieces of data (and so two synchronization signals)
needs to be specified (DATLEN and CHLEN bits in the SPIx_I2SCFGR register) even in
slave mode.
26.6.4
Clock generator
2
The I
S bitrate determines the data flow on the I
frequency.
2
I
S bitrate = number of bits per channel × number of channels × sampling audio frequency
For a 16-bit audio, left and right channel, the I
2
I
S bitrate = 16 × 2 × f
It will be: I
Figure 300. PCM standard waveforms (16-bit)
CK
WS
WS
long frame
SD
MSB
CK
WS
short frame
Up to 13-bits
WS
long frame
SD
MSB
S
2
S bitrate = 32 x 2 x f
Serial peripheral interface/ inter-IC sound (SPI/I2S)
13-bits
LSB MSB
16 bits
LSB
2
S data line and the I
2
S bitrate is calculated as follows:
if the packet length is 32-bit wide.
S
RM0402 Rev 6
MS30106V1
MS30107V1
2
S clock signal
843/1163
862
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