Usart Interrupts; Table 153. Usart Interrupt Requests - ST STM32F412 Reference Manual

Advanced arm-based 32-bit mcus
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RM0402
Universal synchronous receiver transmitter (USART) /universal asynchronous receiver
Note:
Special behavior of break frames: when the CTS flow is enabled, the transmitter does not
check the nCTS input state to send a break.
25.5

USART interrupts

Transmit Data Register Empty
CTS flag
Transmission Complete
Received Data Ready to be Read
Overrun Error Detected
Idle Line Detected
Parity Error
Break Flag
Noise Flag, Overrun error and Framing Error
in multibuffer communication
The USART interrupt events are connected to the same interrupt vector (see
During transmission: Transmission Complete, Clear to Send or Transmit Data Register
empty interrupt.
While receiving: Idle Line detection, Overrun error, Receive Data register not empty,
Parity error, LIN break detection, Noise Flag (only in multi buffer communication) and
Framing Error (only in multi buffer communication).
These events generate an interrupt if the corresponding Enable Control Bit is set.

Table 153. USART interrupt requests

Interrupt event
RM0402 Rev 6
Event flag
Enable control bit
TXE
TXEIE
CTS
CTSIE
TC
TCIE
RXNE
RXNEIE
ORE
IDLE
IDLEIE
PE
PEIE
LBD
LBDIE
NF or ORE or FE
EIE
Figure
269).
799/1163
810

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