Usart Interrupts; Table 96. Usart Interrupt Requests; Figure 247. Usart Interrupt Mapping Diagram - ST STM32F207 Series Reference Manual

Advanced arm-based 32-bit mcus

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USART interrupts

Transmit Data Register Empty

Transmission Complete

Received Data Ready to be Read

Overrun Error Detected

Idle Line Detected

Parity Error

Noise Flag, Overrun error and Framing Error in multibuffer

communication

The USART interrupt events are connected to the same interrupt vector (see

During transmission: Transmission Complete, Clear to Send or Transmit Data Register

empty interrupt.

While receiving: Idle Line detection, Overrun error, Receive Data register not empty,

Parity error, LIN break detection, Noise Flag (only in multi buffer communication) and

Framing Error (only in multi buffer communication).

These events generate an interrupt if the corresponding Enable Control Bit is set.

Universal synchronous asynchronous receiver transmitter (USART)

Interrupt event

RM0033 Rev 9

Enable control

NF or ORE or FE EIE

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