Pmrst_Enable_Set Register; Pmrst_Enable_Clr Register - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers

13.4.4.37 PMRST_ENABLE_SET Register

The power management and reset interrupt enabled set register (PMRST_ENABLE_SET) is described
in the figure and table below.
31
7 4
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; W1S = Write 1 to set; -n = value after reset
Bit Field
31-4 Reserved
3 LINK_RST_REQ
2 PM_PME
1 PM_TO_ACK
0 PM_TURNOFF

13.4.4.38 PMRST_ENABLE_CLR Register

The power management and reset interrupt enabled clear register (PMRST_ENABLE_CLR) is
described in the figure and table below.
31
7 4
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; W1C = Write 1 to clear; -n = value after reset
Bit Field
31-4 Reserved
3 LINK_RST_REQ
2 PM_PME
1 PM_TO_ACK
0 PM_TURNOFF
1328
Peripheral Component Interconnect Express (PCIe)
Preliminary
Figure 13-49. PMRST_ENABLE_SET Register
3
LINK_RST_REQ
R/W1S-0
Table 13-52. PMRST_ENABLE_SET Register Field Descriptions
Value Description
0 Reserved
0 Link Request Reset interrupt enable. Set to enable the interrupt. Read 1 means interrupt is
enabled.
0 Power Management PME message received interrupt enable. Set to enable the interrupt. Read
1 means interrupt is enabled.
0 Power Management ACK received interrupt enable. Set to enable the interrupt. Read 1 means
interrupt is enabled.
0 Power Management Turnoff message received enable. Set to enable the interrupt. Read 1
means interrupt is enabled.
Figure 13-50. PMRST_ENABLE_CLR Register
3
LINK_RST_REQ
R/W1C-0
Table 13-53. PMRST_ENABLE_CLR Register Field Descriptions
Value Description
0 Reserved
0 Link Request Reset interrupt disable. Set to disable the interrupt. Read 1 means interrupt is
enabled.
0 Power Management PME message received interrupt disable. Set to disable the interrupt. Read
1 means interrupt is enabled.
0 Power Management ACK received interrupt disable. Set to disable the interrupt. Read 1 means
interrupt is enabled.
0 Power Management Turnoff message received disable. Set to disable the interrupt. Read 1
means interrupt is enabled.
© 2011, Texas Instruments Incorporated
Reserved
R-0
2
PM_PME PM_TO_ACK
R/W1S-0 R/W1S-0
Reserved
R-0
2
PM_PME PM_TO_ACK
R/W1C-0 R/W1C-0
www.ti.com
1 0
PM_TURNOFF
R/W1S-0
1 0
PM_TURNOFF
R/W1C-0
SPRUGX9 – 15 April 2011
Submit Documentation Feedback
8
8