Texas Instruments TMS320C6A816 Series Technical Reference Manual page 984

C6-integra dsp+arm processors
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Registers
Table 9-29. Present State Register (SD_PSTATE) Field Descriptions (continued)
Bit
Field
0
CMDI
984
Secure Digital (SD)/—Secure Digital I/O (SDIO) Card Interface
Preliminary
Value
Description
Command inhibit(SD_CMD). This status bit indicates that the SD_CMD line is in use. This bit
is cleared to 0 when the most significant byte is written into the command register. This bit is
not set when Auto CMD12 is transmitted. This bit is cleared to 0 in either the following cases:
• After the end bit of the command response, excepted if there is a command conflict error
(SD_STAT[17] CCRC bit or SD_STAT[18] CEB bit set to 1) or a Auto CMD12 is not
executed (SD_AC12[0] ACNE bit).
• After the end bit of the command without response (SD_CMD[17:16] RSP_TYPE bits set to
"00"). In case of a command data error is detected (SD_STAT[19] CTO bit set to 1), this
register is not automatically cleared.
Read 0
Issuing of command using SD_CMD line is allowed
Read 1
Issuing of command using SD_CMD line is not allowed
© 2011, Texas Instruments Incorporated
www.ti.com
SPRUGX9 – 15 April 2011
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