Interrupt Controller Resets; Interrupt Controller Interrupt Inputs And Outputs - Texas Instruments TMS320C6A816 Series Technical Reference Manual

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8.2 Architecture
This section discusses the architecture of the interrupt controller.
8.2.1 Clocking and Reset
8.2.1.1 ARM A8 INTC Clocks
The interrupt controller runs at half the rate of the ARM A8 functional clock. The interface clock, used
for register access, runs at the rate of the interconnect bus clock (equal to the rate of the ARM A8
interface clock).
8.2.1.2 Hardware and Software Reset
Table 8-1 lists the ARM A8 subsystem INTC resets.
Type Name
Hardware ARM A8 top-level
Reset
Software SOFTRESET
8.2.2 Interrupt Request Lines
Table 8-2 lists the incoming and outgoing interrupt lines of the ARM A8 INTC.
For mapping of interrupt from various modules to the ARM A8 INTC, refer to your device-specific data
manual. Check availability of modules and features in a particular device. Ensure that interrupts of
unavailable modules and features are masked in ARM A8 subsystem.
Type
Interrupt request
inputs
Interrupt request
outputs
8.2.3 Interrupt Processing
8.2.3.1 Input Selection
The INTC supports only level-sensitive incoming interrupt detection. A peripheral asserting an interrupt
maintains it until software has handled the interrupt and instructed the peripheral to deassert the
interrupt. A software interrupt is generated if the corresponding bit in the INTCPS_ISR_SETn register is
set (register bank number: n = [0,1,2,3] for the MPU subsystem INTC, 128 incoming interrupt lines are
supported). The software interrupt clears when the corresponding bit in the INTCPS_ISR_CLEARn
register is written. Typical use of this feature is software debugging.
SPRUGX9 – 15 April 2011
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Preliminary
Table 8-1. Interrupt Controller Resets
Source
PRCM
INTCPS_SYSCONFIG[1]SOFTRESET bit, write 1 to clear. Read returns 0. Active high
Table 8-2. Interrupt Controller Interrupt Inputs and Outputs
Number Name
Up to 128 Refer to data manual
2 INTC_FIQ
INTC_IRQ
© 2011, Texas Instruments Incorporated
Mapping Comment
Refer to data manual Inputs to ARM A8 INTC module, source from
various modules.
INTC_FIQ FIQ is fast interrupt to ARM
INTC_IRQ IRQ is normal input to ARM A8
Architecture
Activation
Active low
905
Interrupt Controller