Pmcap Register; 13.4.11 Power Management Capability Registers; Pmcap Register Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

C6-integra dsp+arm processors
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Registers

13.4.11 Power Management Capability Registers

Offset
0h
4h

13.4.11.1 PMCAP Register

31
23
22
AUX_CURR_N
R-0
15
7
LEGEND: R = Read only; -n = value after reset
Bit
Field
31-27
PME_SUPP_N
26
D2_SUPP_N
25
D1_SUPP_N
24-22
AUX_CURR_N
21
DSI_N
20
Reserved
19
PME_CLK
18-16
PME_SPEC_VER
15-8
PM_NEXT_PTR
7-0
PM_CAP_ID
1384
Peripheral Component Interconnect Express (PCIe)
Preliminary
Table 13-144. Power Management Capability Registers
Acronym
PMCAP
PM_CTL_STAT
Figure 13-135. PMCAP Register
PME_SUPP_N
R-0
21
20
DSI_N
Reserved
R-0
R-0
PM_NEXT_PTR
PM_CAP_ID
Table 13-145. PMCAP Register Field Descriptions
Value
Description
0-1Fh
PME Support. Writable from internal bus interface.
0
D2 Support. Writable from internal bus interface.
0
D1 Support. Writable from internal bus interface.
0-7h
Auxiliary Current. Writable from internal bus interface.
0
Device Specific Initialization. Writable from internal bus interface.
0
Reserved
0
PME Clock. Hardwired to Zero.
0-7h
Power Management Specification Version. Writable from internal bus interface.
0-FFh
Next Capability Pointer. Writable from internal bus interface.
0-FFh
Power Management Capability ID.
© 2011, Texas Instruments Incorporated
27
26
D2_SUPP_N
R-0
19
18
PME_CLK
R-0
R-50h
R-1
www.ti.com
Section
Section 13.4.11.1
Section 13.4.11.2
25
24
D1_SUPP_N
AUX_CURR_N
R-0
R-0
16
PME_SPEC_VER
R-3h
8
0
SPRUGX9 – 15 April 2011
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