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Architecture
19.2.4.2.3 Programming Models
Example 19-3. Receive IrDA
Receive IrDA frame with no parity, baud-rate = 1.152 Mbs, FIFOs disabled.
•
MDR1 = 04h
– MDR1[2:0] = 100b: MIR mode
•
LCR = 86h
– LCR[7] = 1: access to write DLL and DLH
– LCR[2] = 1: set number of stop bits to 2 (default: 1)
– LCR[1:0] = 10b: set word length to 7 bits (default: 5)
•
DLL = 01h: 1.152 Mbs
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DLH = 0h: 1.152 Mbs
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LCR = 06h: LCR[7] = 0 disables access to DLL and DLH and gives access to MCR, FCR, IER, BLR,
EBLR, RHR
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MCR =03h: forces DTR and RTS output to active (low).
•
optional: IER = 1: enable RHR interrupt
Example 19-4. Transmit IrDA
Transmit IrDA 60 bytes frame with no parity, baud-rate = 1.152 Mbs, FIFOs disabled.
•
MDR1 = 04h
– MDR1[2:0] = 100b: MIR mode
•
LCR = 82h
– LCR[7] = 1: access to write DLL and DLH
– LCR[1:0] = 10b: set word length to 7 bits (default: 5)
– optional: LCR[2] = 1: set number of stop bits to 2 (default: 1)
•
DLL = 01h: 1.152 Mbs
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DLH = 0h: 1.152 Mbs
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LCR = 02h: LCR[7] = 0 disables access to DLL and DLH and gives access to MCR, FCR, IER, BLR,
EBLR, THR
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MCR =01h: force DTR output to active (low)
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optional: IER = 02h: enable THR interrupt
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TXFLL = 3Ch: transmit frame length is 60 bytes
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optional: EBLR = 08: transmit 8 additional starts of frame (MIR mode requires 2 starts anyway)
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optional: set ACREG[3] = 1: SIP sends at the end of transmission
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THR = desired data to be transmitted
1694
UART/IrDA/CIR Module
Preliminary
© 2011, Texas Instruments Incorporated
www.ti.com
SPRUGX9 – 15 April 2011
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