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10.2.8.1.2 Transfers Through the Data Port (DAT)
NOTE: To perform internal transfers through the data port, clear XBUSEL/RBUSEL bit to 0 in the
respective XFMT/RFMT registers. Failure to do so will result in software malfunction.
Typically, you will access the McASP XRBUF registers through the data port. To access through the
data port, simply have the CPU or DMA access the XRBUF through its data port location. Refer to the
device-specific data manual for the exact memory address. Through the data port, the DMA/CPU can
service all the serializers through a single address. The McASP automatically cycles through the
appropriate serializers.
For transmit operations through the data port, the DMA/CPU should write to the same XBUF data port
address to service all of the active transmit serializers. In addition, the DMA/CPU should write to the
XBUF for all active transmit serializers in incremental (although not necessarily consecutive) order. For
example, if serializers 0, 4, and 5, are set up as active transmitters, the DMA/CPU should write to the
XBUF data port address four times with data for serializers 0, 4, and 5, upon each transmit data ready
event. This exact servicing order must be followed so that data appears in the appropriate serializers.
Similarly, for receive operations through the data port, the DMA/CPU should read from the same RBUF
data port address to service all of the active receive serializers. In addition, reads from the active
receive serializers through the data port return data in incremental (although not necessarily
consecutive) order. For example, if serializers 1, 2, and 3, are set up as active receivers, the DMA/CPU
should read from the RBUF data port address four times to obtain data for serializers 1, 2, and 3, in this
exact order, upon each receive data ready event.
When transmitting, the DMA/CPU must write data to each serializer configured as "active" and
"transmit" within each time slot. Failure to do so results in a buffer underrun condition
(Section
10.2.8.4.2). Similarly, when receiving, data must be read from each serializer configured as
"active" and "receive" within each time slot. Failure to do results in a buffer overrun condition
(Section
10.2.8.4.3).
To perform internal transfers through the data port, clear XBUSEL/RBUSEL bit to 0 in the respective
XFMT/RFMT registers.
10.2.8.1.3 Transfers Through the Configuration Bus (CFG)
NOTE: To perform internal transfers through the configuration bus, set XBUSEL/RBUSEL bit to
1 in the respective XFMT/RFMT registers. Failure to do so will result in software
malfunction.
In this method, the DMA/CPU accesses the XRBUF registers through the configuration bus address.
The exact XRBUF register address for any particular serializer is determined by adding the offset for
that particular serializer to the base address for the particular McASP (found in the device-specific data
manual). XRBUF for the serializers configured as transmitters is given the name XBUFn. For example,
the XRBUF associated with transmit serializer 2 is named XBUF2. Similarly, XRBUF for the serializers
configured as receivers is given the name RBUFn.
Accessing the XRBUF registers through the data port is different because the CPU/DMA only needs to
access one single address. When accessing through the configuration bus, the CPU/DMA must provide
the exact XBUFn or RBUFn address for each access.
When transmitting, DMA/CPU must write data to each serializer configured as "active" and "transmit"
within each time slot. Failure to do so results in a buffer underrun condition
Similarly when receiving, data must be read from each serializer configured as "active" and "receive"
within each time slot. Failure to do results in a buffer overrun condition
To perform internal transfers through the configuration bus, set XBUSEL/RBUSEL bit to 1 in the
respective XFMT/RFMT registers.
SPRUGX9 – 15 April 2011
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Preliminary
© 2011, Texas Instruments Incorporated
(Section
10.2.8.4.2).
(Section
10.2.8.4.3).
Multichannel Audio Serial Port (McASP)
Architecture
1043
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