Pin Data Output Register (Pdout) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers
Table 10-13. Pin Data Output Register (PDOUT) Field Descriptions
Bit Field Value Description
31 AFSR
0
1
30 AHCLKR
0
1
29 ACLKR
0
1
28 AFSX
0
1
27 AHCLKX
0
1
26 ACLKX
0
1
25 AMUTE
0
1
24-6 Reserved 0
5-0 AXR[5-0]
0
1
1076
Multichannel Audio Serial Port (McASP)
Preliminary
Determines drive on AFSR output pin when the corresponding PFUNC[31] and PDIR[31] bits are set to 1.
Pin drives low.
Pin drives high.
Determines drive on AHCLKR output pin when the corresponding PFUNC[30] and PDIR[30] bits are set to
1.
Pin drives low.
Pin drives high.
Determines drive on ACLKR output pin when the corresponding PFUNC[29] and PDIR[29] bits are set to 1.
Pin drives low.
Pin drives high.
Determines drive on AFSX output pin when the corresponding PFUNC[28] and PDIR[28] bits are set to 1.
Pin drives low.
Pin drives high.
Determines drive on AHCLKX output pin when the corresponding PFUNC[27] and PDIR[27] bits are set to
1.
Pin drives low.
Pin drives high.
Determines drive on ACLKX output pin when the corresponding PFUNC[26] and PDIR[26] bits are set to 1.
Pin drives low.
Pin drives high.
Determines drive on AMUTE output pin when the corresponding PFUNC[25] and PDIR[25] bits are set to
1.
Pin drives low.
Pin drives high.
Reserved. The reserved bit location always returns the default value. A value written to this field has no
effect. If writing to this field, always write the default value for future device compatibility.
Determines drive on AXR[n] output pin when the corresponding PFUNC[n] and PDIR[n] bits are set to 1.
Pin drives low.
Pin drives high.
© 2011, Texas Instruments Incorporated
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SPRUGX9 – 15 April 2011
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