Texas Instruments TMS320C6A816 Series Technical Reference Manual page 999

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Table 9-34. Interrupt Signal Enable Register (SD_ISE) Field Descriptions (continued)
Bit Field Value Description
19 CIE_SIGEN
0
1
18 CEB_SIGEN
0
1
17 CCRC_SIGEN
0
1
16 CTO_SIGEN
0
1
15 NULL
14-11 Reserved 0
10 BSR_SIGEN
0
1
9 OBI_SIGEN
0
1
8 CIRQ_SIGEN
0
1
7 CREM_SIGEN
0
1
6 CINS_SIGEN
0
1
5 BRR_SIGEN
0
1
4 BWR_SIGEN
0
1
3 DMA_SIGEN
0
1
2 BGE_SIGEN
0
1
SPRUGX9 – 15 April 2011
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Preliminary
Command index error signal status enable
Masked
Enabled
Command end bit error signal status enable
Masked
Enabled
Command CRC error signal status enable
Masked
Enabled
Command timeout error signal status enable
Masked
Enabled
Fixed to 0. The host driver shall control error interrupts using the error interrupt signal enable register.
Writes to this bit are ignored.
Reserved bit field. Do not write any value.
Boot Status signal status enable. A write to this register when SD_CON[BOOT] is cleared to 0 is ignored
Masked
Enabled
Out-of-band interrupt signal status enable. A write to this register when SD_CON[14] OBIE is cleared to
0 is ignored.
Masked
Enabled
Card interrupt signal status enable. A clear of this bit also clears the corresponding status bit.
During 1-bit mode, if the interrupt routine does not remove the source of a card interrupt in the SDIO
card, the status bit is reasserted when this bit is set to 1.
This bit must be set to 1 when entering in smart idle mode to enable system to identity wake-up event
and to allow controller to clear internal wake-up source.
Masked
Enabled
Card Removal signal status enable This bit must be set to 1 when entering in smart idle mode to enable
system to identity wake-up event and to allow controller to clear internal wake-up source.
Masked
Enabled
Card Insertion signal status enable. This bit must be set to 1 when entering in smart idle mode to enable
system to identity wake-up event and to allow controller to clear internal wake-up source.
Masked
Enabled
Buffer read ready signal status enable
Masked
Enabled
Buffer write ready signal status enable
Masked
Enabled
DMA signal status enable
Masked
Enabled
Block gap event signal status enable
Masked
Enabled
© 2011, Texas Instruments Incorporated
Secure Digital (SD)/—Secure Digital I/O (SDIO) Card Interface
Registers
999