Transmitter Dma Event Control Register (Xevtctl); Transmitter Dma Event Control Register (Xevtctl) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers

10.3.35 Transmitter DMA Event Control Register (XEVTCTL)

The transmitter DMA event control register (XEVTCTL) contains a disable bit for the transmit DMA
event. The XEVTCTL is shown in
NOTE: Device-specific registers
Accessing REVTCTL not implemented on a specific device may cause improper device
operation.
Figure 10-72. Transmitter DMA Event Control Register (XEVTCTL)
31
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 10-44. Transmitter DMA Event Control Register (XEVTCTL) Field Descriptions
Bit Field Value
31-1 Reserved 0
0 XDATDMA
0
1
1114
Multichannel Audio Serial Port (McASP)
Preliminary
Figure 10-72
Reserved
Reserved
R-0
Description
Reserved. The reserved bit location always returns the default value. A value written to this field has no
effect. If writing to this field, always write the default value for future device compatibility.
Transmit data DMA request enable bit. If writing to this bit, always write the default value of 0.
Transmit data DMA request is enabled.
Reserved
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and described in Table 10-44.
R-0
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16
1 0
XDATDMA
R/W-0
SPRUGX9 – 15 April 2011
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