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16.3.1
General Utilities: Structures and Subroutines Sample Program Uses
/* Allocating memory for Command List. The structure pointed to by this
address range is 1K-bytes in length and must be 1K-byte aligned.
Note that each command header occupies 32 bytes of memory and 32
command headers require 1024 bytes of memory.
*/
#pragma DATA_SECTION(CmdLists,
#pragma DATA_ALIGN(CmdLists, 1024);
CmdListHeader CmdLists[32]={0};
/* Indicates the 32-bit physical address of the command table, which
contains
the command FIS,
ATAPI Command,
andPRD table.
This address must be aligned to a 128-bytes of memory,
*/
#pragma DATA_SECTION(CmdTable,
#pragma DATA_ALIGN(CmdTable, 128);
CommandTable CmdTable[LISTLENGTH];
/* Indicates the 32-bit base physical address for received FISes. The
structure pointed to by this address range is 256 bytes in length
and must be 256-byte aligned.
*/
#pragma DATA_SECTION(RcvFis,
#pragma DATA_ALIGN(RcvFis, 256);
ReceiveFis RcvFis;
#pragma DATA_SECTION(prdTableDataBuff,
unsigned char prdTableDataBuff[LISTLENGTH][PRDLENGTH][DATABUFFERLEN];
#define NUMOFPORTS
//
Multiplier
//
#define LISTLENGTH
#define WRITE_CMD_SLOT
#define READ_CMD_SLOT
// WARNING. PRDLENGTH can not be greater than 8 for this program.
//
See Note captured by the area when memory has been reserved for
//
within sata_utilities.c for Command Table "CmdTable" for
//
more information.
#if 1
#define _MAX_DATA_TRANSFER_
#endif
#ifndef _MAX_DATA_TRANSFER_
#define PRDLENGTH
#define DATABUFFERLEN (256)
#else // Max Data Size Transfer 8K Bytes within 2 PRD Descriptors
#define PRDLENGTH
#define DATABUFFERLEN (2*4096)
#endif
#if ((PRDLENGTH > 8) | (WRITE_CMD_SLOT > LISTLENGTH-1) | (READ_CMD_SLT > LISTLENGTH-1))
#error PRDLENGTH ENTRY ERROR - PROGRAM HARD CODED FOR MAX VALUE OF 8 - CMD SLOT ENTRY ERROR
#endif
#define DESIRED_SPEED
#define DEVICE_LBA_ADDRESS
#define WAIT_500_MILLISECONDS
programmed correctly.
#define WAIT_1_MILLISECOND
#define ONE_MS_VALUE
wait time.
#define DMA_BURST_LENGTH
1)=256
#define DMA_TRANSACTION_SIZE
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Preliminary
OCMCRAM0);
OCMCRAM0);
OCMCRAM0);
OCMCRAM0);
(2)
// Supports Two HBA Ports. However it can support up to
15 additional Ports, per HBA Port, for a combined total of 30 Port
Ports (PMP) capable of attaching to 30 devices.
(2)
// Max Command Header Per Port is 32
(0)
// Value used here should be <= LISTLENGTH-1
(1)
// Value used here should be <= LISTLENGTH-1
// Define this in project file when needed.
// 512 Bytes Data Size within 2 PRD Descriptors.
(2)
// Max PRD Length is 65535 per port.
// DMA Data Buffer Length
(2)
// Max PRD Length is 65535 per port.
// DMA Data Buffer Length
(GEN1)
(0x00000002) // Dev28bitLbaAddress = 28-Bit LBA Address
(50)
// This should be set to 500 once the ONE_MS_VALUE is
(1)
(1)
// Number of CPU Cycles needed to generate a millisecond
(0x9)
(0x4)
© 2011, Texas Instruments Incorporated
// GOASFASTASDEVICE, GEN1, GEN2
// [0x0 - 0x9] Burst=2^(–1) i.e., 0x8=> 2^(9-
// [0x0 - 0xA] TransSize=2^n i.e., 0xA=> 2^10=1024
Serial ATA (SATA) Controller
Use Cases
1575
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