Texas Instruments TPS54672EVM-222 User Manual

Evaluation module

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TPS54672/872/972
Evaluation Module
User's Guide
November 2002
PMP EVMs
SLVU076

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Summary of Contents for Texas Instruments TPS54672EVM-222

  • Page 1 TPS54672/872/972 Evaluation Module User’s Guide November 2002 PMP EVMs SLVU076...
  • Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
  • Page 3 EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods.
  • Page 4 EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright  2002, Texas Instruments Incorporated...
  • Page 5 Information About Cautions and Warnings Preface Read This First About This Manual This user’s guide describes the characteristics, operation, and the use of the TPS54672EVM−222, TPS54872EVM−222, and TPS54972EVM−222 evalua- tion modules. It covers all pertinent areas involved to properly use this EVM board along with the devices that it supports.
  • Page 6 Trademarks TI Logo is a trademark of Texas Instruments Incorporated. PowerPAD is a trademark of Texas Instruments Incorporated.
  • Page 7: Table Of Contents

    Contents Contents Introduction ..............Background .
  • Page 8 Contents Figures 1−1 Frequency Trimming Resistor Selection Graph ........2−1 Connection Diagram .
  • Page 9 ........1−2 TPS54672EVM-222 Performance Specification Summary ......
  • Page 10: Introduction

    Chapter 1 Introduction This chapter contains background information for the TPS54672, TPS54872, and TPS54972 as well as support documentation for the TPS54672EVM-222, TPS54872EVM-222, TPS54972EVM-222 evaluation modules (SLVP222). The TPS54x72EVM−222 performance specifications are given, as well as the schematic and bill of material for the TPS54x72EVM−222.
  • Page 11: Background

    Table 1−1. Input Voltage and Output Current Summary Input Voltage Range Output Current Range TPS54672EVM-222 3.0 V to 6.0 V −6 A to 6 A TPS54872EVM-222 4.0 V to 6.0 V −8 A to 8 A...
  • Page 12: Performance Specification Summary

    A summary of the TPS54x72EVM−222 performance specifications is provided by Table 1−2, Table 1−3, and Table 1−4. All specifications are given for an an output voltage of 1.25 V and an ambient temperature of 25°C, unless otherwise noted. Table 1−2. TPS54672EVM-222 Performance Specification Summary Specification Test Conditions Units 3.3 or...
  • Page 13: Modifications

    Modifications Table 1−4. TPS54972EVM-222 Performance Specification Summary Specification Test Conditions Units Input voltage range Output voltage set point 0.42 1.25 1.75 Output current range = 3 V to 4 V −9 Line regulation = 4.5 A Load regulation = 5 V, I = 0 A to 9 A −35 = 40 µs...
  • Page 14: Frequency Trimming Resistor Selection Graph

    Modifications Figure 1−1. Frequency Trimming Resistor Selection Graph 60 70 80 90 100 110 120 130 140 150 160 170 180 R − Resistance − kΩ The slow start time is typically 3.6 ms, and is controlled internally. The slow start time cannot be made faster than 3.6 ms.
  • Page 16 Chapter 2 Test Setup and Results This chapter describes how to properly connect, set up, and use the TPS54x72EVM−222 evaluation module. The chapter also includes test results typical for the TPS54x72EVM−222 and covers efficiency, output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.
  • Page 17: Input/Output Connections

    Input/Output Connections 2.1 Input/Output Connections The TPS54x72EVM−222 has the following four input/output connections: input, input return, output, and output return. A diagram showing the connection points is shown in Figure 2−1. A power supply capable of supplying 6 A should be connected to J1 through a pair of 20 AWG wires. The load should be connected to J2 through a pair of 16 AWG wires.
  • Page 18: Efficiency

    Efficiency 2.2 Efficiency The TPS54x72EVM−222 efficiency peaks at load current of about 2 A, and then decreases as the load current increases towards full load. The efficiency shown in Figure 2−2 is for 5-V (TPS54672, TPS54872) and 3.3 V (TPS54972) inputs at an ambient temperature of 25°C.
  • Page 19: Power Dissipation

    Power Dissipation 2.3 Power Dissipation The low junction-to-case thermal resistance of the PWP package, along with a good board layout, allows the TPS54x72EVM−222 EVMs to output full rated load current while maintaining safe junction temperatures. With a 3.3-V input source and a 6-A load, the junction temperture is approximately 60°C, while the case temperature is approximately 55°C.
  • Page 20: Output Voltage Regulation

    Output Voltage Regulation 2.4 Output Voltage Regulation The output voltage load regulation of the TPS54x72EVM−222 is shown in Figure 2−4, while the output voltage line regulation is shown in Figure 2−5. Measurements are given for an ambient temperature of 25°C. Figure 2−4.
  • Page 21: Load Transients

    Load Transients 2.5 Load Transients The TPS54x72EVM−222 response to load transients is shown in Figure 2−6, Figure 2−7, and Figure 2−8. The current step is from 25 to 75 percent of maximum rated load. Total peak-to-peak voltage variation is as shown, including ripple and noise on the output.
  • Page 22: Load Transient Response, Tps54972

    Load Transients Figure 2−8. Load Transient Response, TPS54972 V O (ac) 50 mV/div I O 2 A/div Time Scale 250 µs/div Test Setup and Results...
  • Page 23: Source-Sink Transient Response

    Source-Sink Transient Response 2.6 Source-Sink Transient Response The TPS54x72EVM−222 response to source-sink current transients is shown in Figure 2−9, Figure 2−10, and Figure 2−11. The current step is from –50% to 50% of maximum rated load. Total peak-to-peak voltage variation is as shown, including ripple and noise on the output.
  • Page 24: Source-Sink Current Transient Response, Tps54972

    Source-Sink Transient Response Figure 2−11. Source-Sink Current Transient Response, TPS54972 V O (ac) 50 mV/div I O 5 A/div Time Scale 250 µs/div Test Setup and Results...
  • Page 25: Loop Characteristics

    Loop Characteristics 2.7 Loop Characteristics The TPS54x72EVM−222 loop respnse characteristics are shown in Figure 2−12 through Figure 2−17. Gain and phase plots are shown for each device at minimum and maximum operating voltage. Figure 2−12. Measured Loop Response, TPS54672, V = 3 V MEASURED LOOP RESPONSE V I = 3 V...
  • Page 26: Measured Loop Response, Tps54872

    Loop Characteristics Figure 2−14. Measured Loop Response, TPS54872, V = 4 V MEASURED LOOP RESPONSE V I = 4 V Phase Gain −10 −30 −60 −20 −90 −30 −40 −120 −50 −150 −180 −60 10 k 100 k f − Frequency − Hz Figure 2−15.
  • Page 27: Measured Loop Response, Tps54972, V I = 3 V

    Loop Characteristics Figure 2−16. Measured Loop Response, TPS54972, V = 3 V MEASURED LOOP RESPONSE V I = 3 V Phase Gain −10 −30 −60 −20 −90 −30 −40 −120 −50 −150 −180 −60 10 k 100 k f − Frequency − Hz Figure 2−17.
  • Page 28: Output Voltage Ripple

    Output Voltage Ripple 2.8 Output Voltage Ripple The TPS54x72EVM−222 output voltage ripple is shown in Figure 2−18, Figure 2−19, and Figure 2−20 for each device type. The input voltage is 3.3 V for the TPS54672 and TPS54972. The input voltage is 5 V for the TPS54872. Output current for each device is the rated full load.
  • Page 29: Measured Output Voltage Ripple, Tps54972

    Output Voltage Ripple Figure 2−20. Measured Output Voltage Ripple, TPS54972 V O (ac) 10 mV/div Time Scale 1 µs/div 2-14...
  • Page 30: Input Voltage Ripple

    Input Voltage Ripple 2.9 Input Voltage Ripple The TPS54x72EVM−222 output voltage ripple is shown in Figure 2−21, Figure 2−22, and Figure 2−23 for each device type. The input voltage is 3.3 V for the TPS54672 and TPS54972. The input voltage is 5 V for the TPS54872. Output current for each device is rated full load.
  • Page 31: Input Voltage Ripple, Tps54972

    Input Voltage Ripple Figure 2−23. Input Voltage Ripple, TPS54972 V O (ac) 100 mV/div Time Scale 1 µs/div 2-16...
  • Page 32: Start-Up

    Start-Up 2.10 Start-Up The start-up voltage waveform of the TPS54x72EVM−222 is shown in Figure 2−24, Figure 2−25, and Figure 2−26. There is approximately a 3.6-ms delay after the input voltage rises above the 2.9 V (3.8 V for the TPS54872) startup voltage threshold until the output voltage begins to ramp up to the final value of 1.25 V.
  • Page 33: Measured Start-Up Waveform, Tps54972

    Start-Up Figure 2−26. Measured Start-Up Waveform, TPS54972 V I 1 V/div V O 500 mV/div Time Scale 2.5 ms/div 2-18...
  • Page 34: Board Layout

    Chapter 3 Board Layout This chapter provides a description of the TPS54x72EVM−222 board layout and layer illustrations. Topic Page Layout ............Board Layout...
  • Page 35: Layout

    Layout 3.1 Layout The board layout for the TPS54x72EVM−222 is shown in Figure 3−1 through Figure 3−6. The top side layer of the TPS54x72EVM−222 is laid out in a manner typical of a user application. The bottom layer of the TPS54x72EVM−222 is designed to accommodate an optional alternate output filter configuration.
  • Page 36: Internal Layer 1 Layout

    Layout Figure 3−2. Internal Layer 1 Layout Figure 3−3. Internal Layer 2 Layout Board Layout...
  • Page 37: Bottom Side Layout (Looking From Top Side)

    Layout Figure 3−4. Bottom Side Layout (Looking From Top Side) Figure 3−5. Top Side Assembly...
  • Page 38: Bottom Side Assembly (Showing Optional Components)

    Layout Figure 3−6. Bottom Side Assembly (Showing Optional Components) Board Layout...
  • Page 40: Schematic And Bill Of Materials

    Chapter 4 Schematic and Bill of Materials The TPS54x72EVM−222 schematic and bill of materials are presented in this chapter. Topic Page Schematic ........... . Bill of Materials .
  • Page 41: Schematic

    Schematic 4.1 Schematic The schematic for the TPS54x72EVM−222 is shown in Figure 4−1. Figure 4−1. TPS54x72EVM−222 Schematic VDDQ 10 µF TPS54672PWP (1) AGND 10 kΩ 0.1 µF VSENSE COMP REFIN STATUS VBIAS 10 kΩ 470 pF BOOT 10 kΩ 0.1 µF 1 µF 71.5 kΩ...
  • Page 42: Bill Of Materials

    Bill of Materials 4.2 Bill of Materials The bill of materials for the TPS54x72EVM−222 is shown in Table 4−1. Table 4−1. TPS54x72EVM−222 Bill of Materials Count −001 −002 −003 RefDes Description SIZE Part Number Capacitor, ceramic, 12 pF, 50 V, Murata GRM1885C1H120JZ01 C0G, 5%...
  • Page 43 Bill of Materials Adaptor, 3,5-mm probe clip ( or 72900 Tektronix 131−4244−00 131−5031−00) − − IC, tracking/termination synch. PWP28 TPS54672PWP PWM switcher. − − IC, tracking/termination synch. PWP28 TPS54872PWP PWM switcher. − − IC, tracking/termination synch. PWP28 TPS54972PWP PWM switcher. PCB, 3 in.

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