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Architecture
13.2.13.1 OCP Power Management
The OCP bus power management is accomplished via the use of Idle and Standby Mode. The list of
Idle/Standby states support by PCIESS are in
IDLE/STANDBY Mode
NO IDLE
SMART IDLE
SMART IDLE w/ WAKE-UP
FORCE IDLE
NO STANDBY
SMART STANDBY
SMART STANDBY w/ WAKE
FORCE STANDBY
Note that if idle mode is reached in default state, the hardware will not request wakeup once in Idle
mode. Software must ensure that it wakes up the hardware by exiting IDLE state in such situations. The
compatibilities of various states are tabulated in
Table 13-13. Relationships Between Power States and Link States
STANDBY Mode
NO STANDBY
SMART STANDBY
SMART STANDBY
SMART STANDBY
SMART STANDBY w/ WAKE
FORCE STANDBY
1302
Peripheral Component Interconnect Express (PCIe)
Preliminary
Table 13-12
Table 13-12. Idle/Stand-by State Supported
Remarks
Supported.
Default State
Supported
Supported
Supported
Default State
Not supported
Supported
Table
13-13.
Tested IDLE Mode(s)
NO IDLE
SMART IDLE WITH WAKE
SMART IDLE
NO IDLE
NA
FORCE IDLE
© 2011, Texas Instruments Incorporated
Link States and transitions
States: L0 and L1
Transitions: L0àL1, L1àL0
States: L0, L1
The valid transitions among these states are tested
Transitions: L0àL1, L1àL0, L0àL2/L3 Ready
The states L2 and L3 need fundamental reset to
recover from.
States: L0, L1, L2/L3 Ready
Transitions: L0àL1, L0àL2/L3 Ready
Valid transitions among these states are tested. Note
that the Remote partner cannot wake up PCIESS if
OCP wakeup is not enabled. A fundamental reset is
always required to wake from L2 or L3 states.
States: L0, L1
Transitions: L0àL1
Only master port will enter standby. No clock gating is
achievable in this configuration.
Not supported
States: Uninitialized Link, L0
Transitions: None
It is not recommended to keep OCP in standby/idle
and link in initialized state. This should be done only
when the remote side is aware that the device
interconnect in not operational and therefore, no
transactions should be initiated.
SPRUGX9 – 15 April 2011
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