Mcbsp_Irqenable_Reg Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

C6-integra dsp+arm processors
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Registers
Table 11-57. McBSP_IRQENABLE_REG Field Descriptions (continued)
Bit
Field
3
RRDYEN
2
REOFEN
1
RFSREN
0
RSYNCERREN
1206
Multichannel Buffered Serial Port (McBSP)
Preliminary
Value
Description
Receive Buffer Threshold enable bit.
0
Receive Buffer Threshold NOT enabled.
1
Receive Buffer Threshold enabled.
Receive End Of Frame enable bit.
0
Receive End Of Frame NOT enabled.
1
Receive End Of Frame enabled.
Receive Frame Synchronization enable bit.
0
Receive Frame Synchronization NOT enabled.
1
Receive Frame Synchronization enabled.
Receive Frame Synchronization Error enable bit.
0
Receive Frame Synchronization Error NOT enabled.
1
Receive Frame Synchronization Error enabled.
© 2011, Texas Instruments Incorporated
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SPRUGX9 – 15 April 2011
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