Tlpcfg Register; Rstcmd Register; Tlpcfg Register Field Descriptions; Rstcmd Register Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers

13.4.4.5 TLPCFG Register

The TLP attribute configuration register (TLPCFG) is described in the figure and table below.
31
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
31-2 Reserved
1 RELAXED
0 NO_SNOOP

13.4.4.6 RSTCMD Register

The reset command and status register ( RSTCMD) is described in the table and figure below.
31
15
LEGEND: R = Read only; W1S = Write 1 to set; -n = value after reset
Bit Field
31-17 Reserved
16 FLUSH_N
15-1 Reserved
0 INIT_RST
1312
Peripheral Component Interconnect Express (PCIe)
Preliminary
Figure 13-17. TLPCFG Register
Reserved
R-0
Table 13-20. TLPCFG Register Field Descriptions
Value Description
0 Reserved
0 Enable Relaxed Ordering for all outgoing TLPs.
0 Enable No Snoop attribute on all outgoing TLPs.
Figure 13-18. RSTCMD Register
Reserved
R-0
Reserved
R-0
Table 13-21. RSTCMD Register Field Descriptions
Value Description
0 Reserved
1 Bridge Flush Status—Reads a zero when no transaction is pending. Used to ensure no pending
transactions before issuing warm reset. Only applicable in PCIESS versions that use Designware
core version 3.57 and newer.
0 Reserved
0 Write 1 to initiate a downstream hot reset sequence on downstream.
© 2011, Texas Instruments Incorporated
Reserved
R-0
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2 1 0
RELAXED NO_SNOOP
R/W-0 R/W-0
17 16
FLUSH_N
R-1
1 0
INIT_RST
W1S-0
SPRUGX9 – 15 April 2011
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