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Architecture
11.2.5.5 Receive Multichannel Selection Mode
The MCR1_REG[0] register RMCM bit determines whether all channels or only selected channels are
enabled for reception. When RMCM = 0, all 128 receive channels are enabled and cannot be disabled.
When RMCM = 1, the receive multichannel selection mode is enabled. In this mode:
•
Channels can be individually enabled or disabled. The only channels enabled are those selected in
the appropriate receive channel enable registers (RCER[A,H]_REG). The way channels are
assigned to the RCER[A,H]_REG registers depends on the number of receive channel partitions
(two or eight), as defined by the MCR1_REG[9] register RMCME bit.
•
If a receive channel is disabled, any bits received in that channel are not transferred to the receive
buffer (RB), and as a result, does not set the receiver ready bit (RRDY). Therefore, no DMA
synchronization event (REVT) is generated and, if the receiver interrupt mode depends on RRDY
(RINTM = 00b), no interrupt is generated.
As an example of how the McBSP behaves in the receive multichannel selection mode, suppose you
enable only channels 0, 15, and 39 and that the frame length is 40. The McBSP:
•
Accepts bits shifted in from the McBSP.DR pin in channel 0
•
Ignores bits received in channels 1–14
•
Accepts bits shifted in from the McBSP.DR pin in channel 15
•
Ignores bits received in channels 16–38
•
Accepts bits shifted in from the McBSP.DR pin in channel 39
11.2.5.6 Using Two Partitions (legacy only)
For multichannel selection operation in the receiver and/or the transmitter, you can use two partitions or
eight partitions. If you choose the 2–partition mode (RMCME = 0 for reception, XMCME = 0 for
transmission), McBSP channels are activated using an alternating scheme. In response to a
frame–synchronization pulse, the receiver or transmitter begins with the channels in partition A and
then alternates between partitions B and A until the complete frame has been transferred. When the
next frame–synchronization pulse occurs, the next frame is transferred beginning with the channels in
partition A.
11.2.5.6.1 Assigning Blocks to Partitions A and B
For reception, any two of the eight receive–channel blocks can be assigned to receive partitions A and
B, which means up to 32 receive channels can be enabled at any given point in time. Similarly, any two
of the eight transmit–channel blocks (up 32 enabled transmit channels) can be assigned to transmit
partitions A and B.
For reception:
•
Assign an even–numbered channel block (0, 2, 4, or 6) to receive partition A by writing to the
RPABLK bits. In the receive multichannel selection mode, the channels in this partition are
controlled by receive channel enable register A (RCERA_REG).
•
Assign an odd–numbered block (1, 3, 5, or 7) to receive partition B with the RPBBLK bits. In the
receive multichannel selection mode, the channels in this partition are controlled by receive channel
enable register B (RCERB_REG).
For transmission:
•
Assign an even–numbered channel block (0, 2, 4, or 6) to transmit partition A by writing to the
XPABLK bits. In one of the transmit multichannel selection modes, the channels in this partition are
controlled by transmit channel enable register A (XCERA_REG).
•
Assign an odd–numbered block (1, 3, 5, or 7) to transmit partition B with the XPBBLK bits. In one of
the transmit multichannel selection modes, the channels in this partition are controlled by transmit
channel enable register B (XCERB_REG).
1146
Multichannel Buffered Serial Port (McBSP)
Preliminary
© 2011, Texas Instruments Incorporated
www.ti.com
SPRUGX9 – 15 April 2011
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