Texas Instruments TMS320C6A816 Series Technical Reference Manual page 1587

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while ((sataRegs->P0CMD & AHCI_PxCMD_CR) == 0)
waitForXms(1);
return(0);
}
char submitCmd(Uint8 commandType, Uint8 commandSlot) {
// Make sure both the Command List and Receive FIS DMAs are eanbled and running prior to
// submiting command
Uint16 I;
if ((sataRegs->P0CMD & (AHCI_PxCMD_FRE | AHCI_PxCMD_FRE | AHCI_PxCMD_CR | AHCI_PxCMD_ST)) !=
return(1);
switch (commandType) {
case NON_QUEUED_CMD:
sataRegs->P0CI |= (0x1 << commandSlot);
break;
case QUEUED_CMD:
sataRegs->P0SACT |= (0x1 << commandSlot);
sataRegs->P0CI |= (0x1 << commandSlot);
break;
default:
break;
}
return(0);
}
// Basic Interrupt Handler Function.
void sataIsr(void) {
intIsrCnt++;
intIsrFlag=1;
// Ensure all pending Port Interrupts and The Single Global Interrupt are cleared.
clearIntOrErrorDiag(INTFIELDS, sataRegs->P0IS); // Clear P0IS and IS Regs
}
16.3.2 Example on Initialization and Spinning Up Device
//char hetero_doTest(void) {
char sata_setup() {
progStatus1='F';
progStatus2='F';
// Firmware HwInit Fields Configuration values.
// Need to configure this prior to calling sata_init_and_spin_up();
swCtrlFeatures.capSMPS=1;
swCtrlFeatures.capSSS=1;
powered.
swCtrlFeatures.piPi=3;
of Pl need to be set.
swCtrlFeatures.p0cmdEsp=0;
CAP.SXS setting is the Logical OR of all Ports PxCMD.ESP. If any of the PxCMD.ESP is set, the
CAP.SXS will be set too.
swCtrlFeatures.p0cmdHpcp=0; // Since ESP is mutually exclusive with HPCP (as mentioned
in spec) then HPCP should be set to 0.
if(chceckSysMemorySize())
for(;;);
// Clear all allocated System Memory
clearCmdList();
clearCmdTables();
clearRcvFis();
clearDmaBuffers();
// Make sure that both DMAs (Cmd List and Rcv FIS) are not running.
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Preliminary
(AHCI_PxCMD_FRE | AHCI_PxCMD_FRE | AHCI_PxCMD_CR | AHCI_PxCMD_ST))
// Count interrupt.
// Input Pin exist for external activity detection presence.
// Always set to 1 in order to avoid spin up when HBA is
// Supports a two HBA Ports (o and 1). Corresponding bit fields
// The state of this bit is based on the support for eSATA.
// If program stays here, need to fix alignment issue.
// Clear Cmd List allocated within Sys Mem
// Clear Cmd Tables allocated within Sys Mem
// Clear Receive FIS allocated within Sys Mem
// Clear all DMA Buffers
© 2011, Texas Instruments Incorporated
Use Cases
Serial ATA (SATA) Controller
1587