Symtimer_Fltmask Register - Texas Instruments TMS320C6A816 Series Technical Reference Manual

C6-integra dsp+arm processors
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Registers

13.4.12.8 SYMTIMER_FLTMASK Register

31
30
F1_CFG_
F1_IO_
DROP
DROP
R/W-0
R/W-0
23
22
F1_CPL_FUNC_
F1_CPL_REQID_
TEST
TEST
R/W-0
R/W-0
15
14
FC_WDOG_DISABLE
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
31
F1_CFG_DROP
30
F1_IO_DROP
29
F1_MSG_DROP
28
F1_CPL_ECRC_DROP
27
F1_ECRC_DROP
26
F1_CPL_LEN_TEST
25
F1_CPL_ATTR_TEST
24
F1_CPL_TC_TEST
23
F1_CPL_FUNC_TEST
22
F1_CPL_REQID_TEST
21
F1_CPL_TAGERR_TEST
20
F1_LOCKED_RD_AS_UR
19
F1_CFG1_RE_AS_US
18
F1_UR_OUT_OF_BAR
17
F1_UR_POISON
16
F1_UR_FUN_MISMATCH
15
FC_WDOG_DISABLE
14-11
Reserved
10-0
SKP_VALUE
1390
Peripheral Component Interconnect Express (PCIe)
Preliminary
Figure 13-144. SYMTIMER_FLTMASK Register
29
28
F1_MSG_
F1_CPL_ECRC_
DROP
DROP
R/W-0
R/W-0
21
20
F1_CPL_TAGERR_ F1_LOCKED_RD_
TEST
AS_UR
R/W-0
R/W-0
11
Reserved
R-0
Table 13-155. SYMTIMER_FLTMASK Register Field Descriptions
Value
Description
0
Set to allow CFG TLPs on RC
0
Set to allow IO TLPs on RC
0
Set to allow MSG TLPs on RC
0
Set to allow Completion TLPs with ECRC to pass up
0
Set to allow TLPs with ECRC to pass up
0
Set to mask length match for received completion TLPs
0
Set to mask attribute match on received completion TLPs
0
Set to mask traffic class match on received completion TLPs
0
Set to mask function match for received completion TLPs
0
Set to mask request ID match for received completion TLPs
0
Set to mask tag error rules for received completion TLPs
0
Set to treat locked read TLPs as supported for EP, UR for RC.
0
Set to treat type 1 CFG TLPs as supported for EP and UR for RC
0
Set to treat out-of-BAR TLPs as supported requests
0
Set to treat poisoned TLPs as supported requests
0
Set to treat mismatched TLPs as supported
0
Disable FC Watchdog Timer
0
Reserved
0-7FFh
Number of symbol times to wait between transmitting SKP ordered sets. For example,
for a setting of 1536 decimal, the wait will be for 1537 symbol times.
© 2011, Texas Instruments Incorporated
27
26
F1_ECRC_
F1_CPL_LEN_
DROP
TEST
R/W-0
R/W-0
19
F1_CFG1_RE_
F1_UR_OUT_
AS_US
OF_BAR
R/W-0
R/W-0
10
SKP_VALUE
R/W-500h
25
F1_CPL_ATTR_
F1_CPL_TC_
TEST
R/W-0
18
17
F1_UR_POISON
F1_UR_FUN_
MISMATCH
R/W-0
SPRUGX9 – 15 April 2011
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24
TEST
R/W-0
16
R/W-0
0

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