8.4.9 Intcps_Irq_Priority Register; 8.4.10 Intcps_Fiq_Priority Register; Intcps_Irq_Priority Register Field Descriptions; Intcps_Fiq_Priority Register Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers

8.4.9 INTCPS_IRQ_PRIORITY Register

This register supplies the currently active IRQ priority level.
31
15
SPURIOUSIRQFLAG
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
31-7 SPURIOUSIRQFLAG
6-0 IRQPRIORITY

8.4.10 INTCPS_FIQ_PRIORITY Register

This register supplies the currently active FIQ priority level.
31
15
SPURIOUSFIQFLAG
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
31-7 SPURIOUSFIQFLAG
6-0 FIQPRIORITY
922
Interrupt Controller
Preliminary
Figure 8-14. INTCPS_IRQ_PRIORITY Register
SPURIOUSIRQFLAG
R-1FF FFFFh
R-1FF FFFFh
Table 8-12. INTCPS_IRQ_PRIORITY Register Field Descriptions
Value Description
0-1FF FFFFh Spurious IRQ flag
0-7Fh Current IRQ priority
Figure 8-15. INTCPS_FIQ_PRIORITY Register
SPURIOUSFIQFLAG
R-1FF FFFFh
R-1FF FFFFh
Table 8-13. INTCPS_FIQ_PRIORITY Register Field Descriptions
Value Description
0-1FF FFFFh Spurious FIQ flag
0-7Fh Current FIQ priority
© 2011, Texas Instruments Incorporated
7 6
IRQPRIORITY
7 6
FIQPRIORITY
www.ti.com
16
0
R-0
16
0
R-0
SPRUGX9 – 15 April 2011
Submit Documentation Feedback