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19.2.7.5 Wake-Up Interrupt
Wake-up interrupt is a special interrupt, which is not designed in the same way than previous ones.
This interrupt is enabled when the RX_CTS_DSR_WAKE_UP_ENABLE bit of the supplementary
control register (SCR[4]) is set to one. The IIR register is not modified when it occurs, SSR[1] must be
checked to detect a wake-up-event. When wake-up interrupt occurs, the only way to clear it, is to reset
SCR[4] to 0. Wake-up can also occur if the WER[7] TX_WAKEUP_EN is set to 1 and one of the
followings occurred:
•
THR interrupt occurred if it is enabled (omitted if TX DMA request is enabled)
•
TX DMA request occurred if it is enabled
•
TX_STATUS_IT occurred if it is enabled (only IrDA and CIR modes). Can not be used with THR
interrupt
19.2.8 Sleep Modes
19.2.8.1 When in UART Mode
In UART modes, sleep mode is enabled by writing a 1 to IER[4] (when EFR[4] = 1). Sleep mode is
entered when:
•
The serial data input line, RX is idle
•
The TX FIFO and TX shift register are empty
•
The RX FIFO is empty
•
There are no interrupts pending except THR interrupts
It should be noted that sleep mode is a good way to lower power consumption of UART but this state
can be achieved only when the UART is set in modem mode. Therefore, even if the UART has no
functional key role, it must be initialized in a functional mode to take advantage of sleep mode. In sleep
mode the module clock and baud rate clock are stopped internally. Because most registers are clocked
using these clocks the power consumption is greatly reduced. The module wakes up when any change
is detected on the RX line, if data is written to the TX FIFO, when there is any change in the state of the
modem input pins. Note that an interrupt can be generated on a wake up event by setting SCR[4] to 1.
See interrupt section to know how to manage it.
NOTE: Writing to the divisor latches, DLL and DLH, to set the baud clock, BCLK, must not be
done during sleep mode. Therefore, it is advisable to disable sleep mode using IER[4]
before writing to DLL or DLH.
19.2.8.2 When in IR-IrDA and CIR Modes
In IrDA/CIR modes, sleep mode is enabled by writing a 1 to MDR1[3]. Sleep mode is entered when:
•
The serial data input line, RX is idle
•
The TX FIFO and TX shift register are empty
•
The RX FIFO is empty
•
There are no interrupts pending except THR interrupts
The module wakes up when any change is detected on the RX line or if data is written to the TX FIFO.
19.2.9 Idle Modes
Sleep and AutoIdle modes are embedded power-saving features. At the system level, power reduction
techniques can be applied by shutting down certain internal clock and power domains of the device.
•
The UART supports an idle req - idle ack handshaking protocol. This protocol is used at system
level to shut down clocks of the UART in a clean and controlled manner and to switch the UART
from the interrupt generation mode to a wakeup generation mode for unmasked events (Refer to
SYSC[2] and WER).
•
In the wakeup generation mode, interrupt request generation and DMA request generation are
disabled.
SPRUGX9 – 15 April 2011
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Preliminary
© 2011, Texas Instruments Incorporated
Architecture
1709
UART/IrDA/CIR Module
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