Mcbsp_Mcr1_Reg - Texas Instruments TMS320C6A816 Series Technical Reference Manual

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11.3.12 McBSP Multichannel Register 1 (MCR1_REG)
The McBSP_MCR1_REG register is shown in
31
15
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
31-10 Reserved
9 RMCME
8-7 RPBBLK
6-5 RPABLK
4-1 Reserved
SPRUGX9 – 15 April 2011
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Preliminary
Figure 11-44. McBSP_MCR1_REG
10 9
RMCME
R/W-0
Table 11-31. McBSP_MCR1_REG Field Descriptions
Value Description
0 Reserved
RMCME Receive multichannel partition mode bit 0 . Receive multichannel partition mode
determines whether only 32 channels or all 128 channels are to be individually selectable.
RMCME is only applicable if channels can be individually enabled or disabled for reception (RMCM
= 1).
0 2-partition mode (legacy only).
Only partitions A and B are used. You can control up to 32 channels in the receive multichannel
selection mode (RMCM = 1).
Assign 16 channels to partition A with the RPABLK bits. Assign 16 channels to partition B with the
RPBBLK bits.
You can control the channels with the appropriate receive channel enable registers:
RCERA: Channels in partition A
RCERB: Channels in partition B
1 8-partition mode:
All partitions (A through H) are used. Control up to 128 channels in the receive multichannel
selection mode.
You can control the channels with the appropriate receive channel enable registers:
RCERA: Channels 0 through 15
RCERB: Channels 16 through 31
RCERC: Channels 32 through 47
RCERD: Channels 48 through 63
RCERE: Channels 64 through 79
RCERF: Channels 80 through 95
RCERG: Channels 96 through 111
RCERH: Channels 112 through 127
Receive Partition B Block (legacy only)
0 Block 1. Channel 16 to channel 31
1h Block 3. Channel 48 to channel 63
2h Block 5. Channel 80 to channel 95
3h Block 7. Channel 112 to channel 127
Receive Partition A Block (legacy only)
0 Block 0. Channel 0 to channel 15
1h Block 2. Channel 32 to channel 47
2h Block 4. Channel 64 to channel 79
3h Block 6. Channel 96 to channel 111
0 Reserved.
© 2011, Texas Instruments Incorporated
Figure 11-44 and described in
Reserved
R-0
8 7 6 5
RPBBLK RPABLK
R/W-0 R/W-0
Multichannel Buffered Serial Port (McBSP)
Registers
Table 11-31.
4 2 1
Reserved
R-0
16
0
RMCM
R/W-0
1189