Texas Instruments TMS320C6A816 Series Technical Reference Manual page 1602

C6-integra dsp+arm processors
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Registers
Table 16-12. BIST Control Register (BISTCR) Field Descriptions (continued)
Bit
Field
Value
5
FLIP
0-1
4
PV
0
1
3-0
PATTERN
0-Fh
0
1h
2h
3h
4h
5h
6h
7h
8h
9h-Fh
1602
Serial ATA (SATA) Controller
Preliminary
Description
Flip Disparity. Enables changing disparity of the current test pattern to the opposite every time its state
is changed by software.
Pattern Version. Selects either short or long version of the SSOP, HTDP, LTDP, LFSCP, and COMP
patterns.
Short pattern version
Long pattern version
Defines one of the following SATA compliant patterns for far-end retimed/ far-end analog/near-end
analog initiator modes, or non-compliant patterns for transmit-only responder mode when initiated by
software writing to the BISTCR.TXO bit.
Simultaneous switching outputs pattern (SSOP)
High-transition density pattern
Low-transition density pattern
Low-frequency spectral component pattern (LFSCP)
Composite pattern (COMP)
Lone bit pattern (LBP)
Mid-frequency test pattern (MFTP)
High-frequency test pattern (HFTP)
Low-frequency test pattern (LFTP)
Reserved.
© 2011, Texas Instruments Incorporated
www.ti.com
SPRUGX9 – 15 April 2011
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