Texas Instruments TMS320C6A816 Series Technical Reference Manual page 1583

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return(0);
}
void initIntAndClearFlags(void) {
// Make sure Interrupt is disabled (Disable at Port Level followed by Global Level).
// Clear Interrupt at Port Level
enableDisableInt(PORTint, DISABLE, 0xFFFFFFFF); // clearInt(int type, intState,
specificField)
// Disable interrrupt at Global Level
enableDisableInt(GLOBALint, DISABLE, 0);
// Need to clear interrupts at Port Level followed by Global Level.
// Ensure all pending Port Error and Status are cleared.
clearIntOrErrorDiag(ERRORFIELDS, sataRegs->P0SERR);
// Ensure all pending Port Interrupts and The Single Global Interrupt are cleared.
clearIntOrErrorDiag(INTFIELDS, sataRegs->P0IS); // Clear P0IS and IS Regs
}
void invokeHBAReset() {
// HBA Reset will not affect the following Registers settings of PxFB and PxCLB
// regs and HwInit fields of Port Registers are not affected.
// To Do: Check if the Global Registers are affected. Spec mentions not affected.
// Note: COMRESET OOB will not be sent to attached Device because this device supports
// Staggered Spinup capability and P0CMD.SUD is cleared to Zero when HBA Reset
// takes place. Software needs to invoke this if needed.
// Most likely user want to ensure HBA comes up in its default operation state
// or has hung and is unable to idle the port when needing to perform an HBA
// reset. Regardless, there is no need to attempt to idle the HBA from
// running
sataRegs->GHC |= (1 << AHCI_GHC_HR_SHIFT);
// Max Spec time is 1 Second for Reset to complete.
while((sataRegs->GHC & AHCI_GHC_HR) != 0) {
waitForXms(WAIT_500_MILLISECONDS);
waitForXms(WAIT_500_MILLISECONDS);
}
}
char placeHbaInIdle(void) {
// To Place HBA In IDLE, need to make sure both DMAs (Cmd List and Rcv FIS) are not running.
// Order of Disabling the DMA is important.
// Ensure that the Cmd List DMA is not running
// If is running, clear ST and wait for 500ms. Then Check CR.
if (sataRegs->P0CMD & AHCI_PxCMD_ST) {
sataRegs->P0CMD &= ~(1 << AHCI_PxCMD_ST_SHIFT);
waitForXms(WAIT_500_MILLISECONDS);
}// Wait another 500 Milliseconds for CR to clear. This is twice more than required.
if (sataRegs->P0CMD & AHCI_PxCMD_CR)
waitForXms(WAIT_500_MILLISECONDS);
// If P0CMD.CR is still set, HBA probably has hunged. No need to continue.
// Need to perform HBA Reset.
if (sataRegs->P0CMD & AHCI_PxCMD_CR)
return(1);
// Ensure that the Receive FIS DMA is running.
// If is running, clear FRE and wait for 500ms. Then Check FR.
if (sataRegs->P0CMD & AHCI_PxCMD_FRE) {
sataRegs->P0CMD &= ~(1 << AHCI_PxCMD_FRE_SHIFT);
waitForXms(WAIT_500_MILLISECONDS);
SPRUGX9 – 15 April 2011
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Preliminary
// int type=GLOBALint or PORTint
// intState=DISABLE or ENABLE
// specificField=bit field to Enable or Disable
// is used for the RWC feature for PORTint
// clearInt(intType, intState fields2clr)
// int type=GLOBALint or PORTint
// intState=DISABLE or ENABLE
// fields2clr=dontcare for GLOBALint
// is used for the RWC feature for PORTint
© 2011, Texas Instruments Incorporated
// Clear P0SERR Register
Serial ATA (SATA) Controller
Use Cases
1583