Texas Instruments TMS320C6A816 Series Technical Reference Manual page 1250

C6-integra dsp+arm processors
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Architecture
For all these flows, the host process contains the main process and the interrupt routines. The interrupt
routines are called on the interrupt signals or by an internal call if the module is used in polling mode.
In multi-channel master mode, the flows of different channels can be run simultaneously.
12.2.12.3 Main Program
Interrupt Initialization: (a) Reset status bits in MCSPI_IRQSTATUS (b) Enable interrupts in
MCSPI_IRQENA.
Channel Configuration: Write MCSPI_CH(i)CONF.
Start the channel: Write 0000 0001h in MCSPI_CH(i)CTRL.
First write request: TX empty - Generate DMA write event/ polling TX empty flag by CPU to write
First transmit word into MCSPI_TX(i).
End of transfer: Stop the channel by writing 0000 0000h in MCSPI_CH(i)CTRL
The end of transfer depends on the transfer mode.
In multi-channel master mode, be careful not to overwrite the bits of other channels when initializing
MCSPI_IRQSTATUS and MCSPI_IRQENABLE.
12.2.13 Interrupt and DMA Events
McSPI has two DMA requests (Rx and Tx) per channel. It also has one interrupt line for all the interrupt
requests.
1250
Multichannel Serial Port Interface (McSPI)
Preliminary
© 2011, Texas Instruments Incorporated
www.ti.com
SPRUGX9 – 15 April 2011
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