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Introduction
19.1 Introduction
19.1.1 Overview
This processor contains six universal asynchronous receiver/transmitter (UART) devices.
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UART0 is the only full UART
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UART1 through UART5 do not have the full handshaking signals - DCD, DSR, DTR, and RI
NOTE: Some features may not be available or supported in your particular device. For more
information, see your device-specific data manual.
19.1.2 Main Features
The main features of each of the UARTs are:
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Selectable UART/IrDA/CIR modes
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16C750 compatibility
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Dual 64 entry FIFOs for received and transmitted data payload
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Programmable and selectable transmit and receive FIFO trigger levels for DMA and interrupt
generation
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Programmable sleep mode
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Complete status reporting capabilities in both normal and sleep mode
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Frequency prescaler values from 0 to 16383 to generate the appropriate baud rates
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Single 48 MHz clock reference for baud setting
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Two DMA requests, 1 interrupt request to the system
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Break character detection and generation
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Configurable data format
– Data bit: 5, 6, 7, or 8 bits
– Parity bit: Even, odd, none
– Stop-bit: 1, 1.5, 2 bit(s)
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Flow control: Hardware (RTS/CTS) or software (XON/XOFF)
The UART/IrDA module can operate in six different modes:
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UART 16× mode (less than or equal to 230.4 Kbits/s)
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UART 16× mode with autobauding (greater than or equal to 1200 bits/s and less than or equal to
115.2 Kbits/s)
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UART 13× mode (greater than or equal to 460.8 Kbits/s)
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IrDA SIR mode (less than or equal to 115.2 Kbits/s)
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IrDA MIR mode (0.576 and 1.152 Mbits/s)
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IrDA FIR mode (4 Mbits/s)
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CIR mode (programmable modulation rates specific to remote control applications)
1680
UART/IrDA/CIR Module
Preliminary
© 2011, Texas Instruments Incorporated
www.ti.com
SPRUGX9 – 15 April 2011
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