Texas Instruments TMS320C6A816 Series Technical Reference Manual page 1264

C6-integra dsp+arm processors
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Registers
Table 12-14. McSPI Channel (i) Configuration Register (MCSPI_CH(i)CONF) Field Descriptions
Bit
Field
Value
22-21
SPIENSLV
0
1h
2h
3h
20
FORCE
0
1
19
TURBO
0
1
18
IS
0
1
17
DPE1
0
1
16
DPE0
0
1
15
DMAR
0
1
14
DMAW
0
1
13-12
TRM
0
1h
2h
3h
1264
Multichannel Serial Port Interface (McSPI)
Preliminary
(continued)
Description
Channel 0 only and slave mode only: SPI slave select signal detection. Reserved bits (read returns 0)
for other cases.
Detection enabled only on SPIEN[0]
Detection enabled only on SPIEN[1]
Detection enabled only on SPIEN[2]
Detection enabled only on SPIEN[3]
Manual SPIEN assertion to keep SPIEN active between SPI words. (single channel master mode only)
Writing 0 into this bit drives the SPIEN line when MCSPI_CHCONF(i)[EPOL]=0, and drives it high when
MCSPI_CHCONF(i)[EPOL]=1.
Writing 1 into this bit drives the SPIEN line when MCSPI_CHCONF(i)[EPOL]=0, and drives it low when
MCSPI_CHCONF(i)[EPOL]=1
Turbo mode.
Turbo is deactivated (recommended for single SPI word transfer).
Turbo is activated to maximize the throughput for multi-SPI word transfers.
Input select
Data line 0 (SPIDAT[0]) selected for reception.
Data line 1 (SPIDAT[1]) selected for reception.
Transmission enable for data line 1 (SPIDATAGZEN[1])
Data line 1 (SPIDAT[1]) selected for transmission
No transmission on data line 1 (SPIDAT[1])
Transmission enable for data line 0 (SPIDATAGZEN[0])
Data line 0 (SPIDAT[0]) selected for transmission
No transmission on data line 0 (SPIDAT[0])
DMA read request. The DMA read request line is asserted when the channel is enabled and new data
is available in the receive register of the channel. The DMA read request line is deasserted on read
completion of the receive register of the channel.
DMA read request is disabled.
DMA read request is enabled.
DMA write request. The DMA write request line is asserted when the channel is enabled and the
MCSPI_TXn register of the channel is empty. The DMA write request line is deasserted on load
completion of the MCSPI_TXn register of the channel.
DMA write request is disabled.
DMA write request is enabled.
Transmit/receive modes.
Transmit and receive mode
Receive-only mode
Transmit-only mode
Reserved
© 2011, Texas Instruments Incorporated
www.ti.com
SPRUGX9 – 15 April 2011
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