Table of Contents
Advertisement
www.ti.com
9.4.25 Auto CMD12 Error Status Register (SD_AC12)
The host driver may determine which of the errors cases related to Auto CMD12 has occurred by
checking this SD_AC12 register when an auto CMD12 error interrupt occurs.
This register is valid only when auto CMD12 is enabled (SD_CMD[2] ACEN bit) and auto CMD12Error
(SD_STAT[24] ACE bit) is set to 1.
NOTE: These bits are automatically reset when starting a new adtc command with data.
The auto CMD12 error status register (SD_AC12) is shown in
31
Reserved
LEGENDR/W = Read/Write; R = Read only; -n = value after reset
Table 9-35. Auto CMD12 Error Status Register (SD_AC12) Field Descriptions
Bit
Field
31-8
Reserved
7
CNI
6-5
Reserved
4
ACIE
3
ACEB
2
ACCE
1
ACTO
0
ACNE
SPRUGX9 – 15 April 2011
Submit Documentation Feedback
Preliminary
Figure 9-53. Auto CMD12 Error Status Register (SD_AC12)
R-0
Value
Description
0
Reserved bit field. Do not write any value.
Command not issue by Auto CMD12 error. If this bit is set to 1, it means that pending
command is not executed due to Auto CMD12 errorACEB, ACCE, ACTO or ACNE.
Read 0
Not error
Read 1
Command not issued
0
Reserved bit field. Do not write any value.
Auto CMD12 index error. This bit is a set to 1 when response index differs from corresponding
command auto CMD12 index previously emitted.
This bit depends on the command index check enable (SD_CMD[20] CICE bit).
Read 0
No error
Read 1
Auto CMD12 index error
Auto CMD12 end bit error. This bit is set to 1 when detecting a 0 at the end bit position of auto
CMD12 command response.
Read 0
No error
Read 1
AutoCMD12 end bit error
Auto CMD12 CRC error. This bit is automatically set to 1 when a CRC7 error is detected in
the auto CMD12 command response depending on the enable in the SD_CMD[19] CCCE bit.
Read 0
No error
Read 1
Auto CMD12 CRC error
Auto CMD12 timeout error. This bit is set to 1 if no response is received within 64 clock cycles
from the end bit of the auto CMD12 command.
Read 0
No error
Read 1
Auto CMD12 time out
Auto CMD12 not executed. This bit is set to 1 if multiple block data transfer command has
started and if an error occurs in command before Auto CMD12 starts.
Read 0
Auto CMD12 executed
Read 1
Auto CMD12 not executed
© 2011, Texas Instruments Incorporated
Figure 9-53
8
7
6
5
CNI
Reserved
R-0
R-0
Secure Digital (SD)/—Secure Digital I/O (SDIO) Card Interface
Registers
and described in
Table
4
3
2
1
ACIE
ACEB
ACCE
ACTO
R-0
R-0
R-0
R-0
9-35.
0
ACNE
R-0
1001
Advertisement
Table of Contents
