Figure 3.8.1B Memory Access Selection Operation; Table 3.8.1B Mode Pins And Mode Data - Fujitsu F2MC-8L MB89620 Series Hardware Manual

n Memory Access Mode Selection Operation
The mode pin settings and mode data contents select the memory access mode.
Table 3.8.1b lists the mode pin and mode data options.

Table 3.8.1b Mode Pins and Mode Data

Single-chip mode
External ROM mode
Internal ROM/external bus mode
Figure 3.8.1b shows the operation for memory access mode selection.
Check mode pins
Delay for wake-up from
reset source
(external reset or
oscillation stabilization
delay time)
Mode fetch
Check mode data
Set I/O pin functions
for program
execution (RUN)
MB89620 series
Memory access mode
Use external bus
(V , V
SS CC
Read mode data from
external ROM
Reset active?
Fetch mode data and reset
vector from external ROM.
Mode data
Set BUFC, HAK, and HRQ
as external bus control
pins

Figure 3.8.1b Memory Access Selection Operation

Mode pins (MOD0, MOD1)
V , V
SS SS
V , V
SS CC
V , V
SS SS
Reset source generated
)
Mode pins (MOD0, MOD1)
Address and data indeterminate
RD, WR, ALE, and BUFC pin states established
CLK and RDY operating
Address, data, RD, WR, ALE,
CLK, RDY, and BUFC operating
Other than
external bus mode
External bus
Setting prohibited
mode (01 )
H
External ROM Internal ROM/
mode external bus mode
Address, data, RD, WR, ALE,
CLK, RDY, and BUFC operating
External bus pin
control register (BCTR)
Set BUFC, HAK, and HRQ
as output-only ports (P20,
P21, and P22)
Mode data
00
H
01
H
01
H
Do not use external bus
(V , V )
SS SS
Read mode data from
internal ROM
All I/O pins are high
impedance
Reset active?
Fetch mode data and reset
vector from internal ROM.
Mode data
(01 )
H
Single-chip mode (00
Set I/O pins to input or output
depending on their respective port
data direction registers (DDR),
etc.
All I/O pins are available
as ports
CHAPTER 3 CPU
)
H
79