Mode Data - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 7 MODE SETTING
7.3

Mode Data

The mode data is located on the memory of the "FFFFDF
operation after the reset sequence. The mode data is automatically taken into the CPU
by a mode fetch.
Mode Data
While executing the reset sequence, the mode data in the "FFFFDF
register in the CPU core. CPU sets the memory access mode by this mode data. The values of the mode
register can be changed only in the reset sequence. The setting of the mode data is enabled after the reset
sequence.
Figure 7.3-1 shows the configuration of the mode data.
Set Bit of Various Modes (S1,S0)
The S1and S0 bits specify the bus mode and access mode after the reset sequence.
Table 7.3-1 shows the content of the S1, S0 bit setting.
Table 7.3-1 Content of S1 and S0 Bit Setting
S1
0
0
1
1
178
Figure 7.3-1 Bit Configuration of Mode Data
7 6
Mode data M1 M0 0
Bus setting bit
S0
External data bus
0
8-bit mode
External data bus
1
16-bit mode
External data bus
0
8-bit mode
External data bus
1
16-bit mode
" address and specifies the
H
5 4 3 2 1
S1 S0 0 0
Various mode Function extended bit
setting bit (Reserved area)
Functions
Address data bus multiplex
Address data bus non-multiplex
" address is captured into the mode
H
0
0