Figure 3.8-2 Memory Access Selection Operation; Table 3.8-2 Mode Pins And Mode Data - Fujitsu F2MC-8L Series Hardware Manual

CHAPTER 3 CPU
Memory Access Mode Selection Operation
Other setting than the single-chip mode is not enabled.
Table 3.8-2 lists the mode pins and mode data.

Table 3.8-2 Mode Pins and Mode Data

Memory access mode
Single-chip mode
Figure 3.8-2 shows the operation for memory access mode selection.
Check mode pins
Delay for exit from
reset source
(external reset or
oscillation stabilization
delay time)
Mode fetch
Check mode data
Set I/O pin functions
for program
execution (RUN) state
96
Other modes

Figure 3.8-2 Memory Access Selection Operation

Setting
prohibited
Setting
prohibited
Mode pins (MOD0, MOD1)
V , V
SS SS
Settings prohibited
Other than single-chip mode
Other than single-chip mode
Mode data
00
H
Settings prohibited
Reset source generated
Mode pins (MOD0, MOD1)
V , V
SS SS
Single-chip mode
Read mode data from
internal ROM
All I/O pins are high
impedance
Reset active?
Fetch mode data and reset
vector from internal ROM.
Mode data
Single-chip mode (00
Set I/O pins to input or output
depending on their respective port
data direction registers (DDR),
etc.
All I/O pins are available
as ports
)
H