Standby Mode; Table 12. Standby Mode - ST STM32F100 Series Reference Manual

RM0041
4.3.5

Standby mode

The Standby mode allows to achieve the lowest power consumption. It is based on the
®
Cortex -M3 deepsleep mode, with the voltage regulator disabled. The 1.8 V domain is
consequently powered off. The PLL, the HSI oscillator and the HSE oscillator are also
switched off. SRAM and register contents are lost except for registers in the Backup domain
and Standby circuitry (see
Entering Standby mode
Refer to
In Standby mode, the following features can be selected by programming individual control
bits:
•
Independent watchdog (IWDG): the IWDG is started by writing to its Key register or by
hardware option. Once started it cannot be stopped except by a reset. See
Section 18.3: IWDG functional
• Real-time clock (RTC): this is configured by the RTCEN bit in the Backup domain
control register (RCC_BDCR)
•
Internal RC oscillator (LSI RC): this is configured by the LSION bit in the Control/status
register (RCC_CSR).
•
External 32.768 kHz oscillator (LSE OSC): this is configured by the LSEON bit in the
Backup domain control register (RCC_BDCR)
Exiting Standby mode
The microcontroller exits the Standby mode when an external reset (NRST pin), an IWDG
reset, a rising edge on the WKUP pin or the rising edge of an RTC alarm occurs (see
Figure 196: RTC simplified block
Standby except for
After waking up from Standby mode, program execution restarts in the same way as after a
Reset (boot pins sampling, vector reset is fetched, etc.). The SBF status flag in the
control/status register (PWR_CSR)
Refer to
Standby mode
Mode entry
Mode exit
Wakeup latency
Figure
Table 12 for more details on how to enter Standby mode.
Power control/status register
Table 12 for more details on how to exit Standby mode.
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– Set SLEEPDEEP in Cortex
– Set PDDS bit in Power Control register (PWR_CR)
– Clear WUF bit in Power Control/Status register (PWR_CSR)
– No interrupt (for WFI) or event (for WFI) is pending
WKUP pin rising edge, RTC alarm event's rising edge, external Reset in
NRST
Reset phase
4).
description.
diagram). All registers are reset after wakeup from
(PWR_CSR).
indicates that the MCU was in Standby mode.

Table 12. Standby mode

Description
®
-M3 System Control register
pin, IWDG Reset.
RM0041 Rev 6
Power control (PWR)
Power
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