Backup Registers (Bkp); Bkp Introduction; Bkp Main Features - ST STM32F100 Series Reference Manual

Backup registers (BKP)

5 Backup registers (BKP)
Low-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 16 and 32 Kbytes.
Medium-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 64 and 128 Kbytes.
High-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 256 and 512 Kbytes.
This section applies to the whole STM32F100xx family, unless otherwise specified.
5.1

BKP introduction

The backup registers are ten 16-bit registers in low and medium density devices, 42
registers in high-density devices for storing 20 or 84 bytes of user application data.
They are implemented in the backup domain that remains powered on by V
V power is switched off. They are not reset when the device wakes up from Standby
DD
mode or by a system reset or power reset.
In addition, the BKP control registers are used to manage the Tamper detection feature and
RTC calibration.
After reset, access to the Backup registers and RTC is disabled and the Backup domain
(BKP) is protected against possible parasitic write access. To enable access to the Backup
registers and the RTC, proceed as follows:
•
enable the power and backup interface clocks by setting the PWREN and BKPEN bits
in the RCC_APB1ENR register
•
set the DBP bit in the Power control register (PWR_CR) to enable access to the
Backup registers and RTC.
5.2

BKP main features

•
20-byte data registers (in low and medium-density devices) or 40-byte data registers (in
high-density devices)
•
Status/control register for managing tamper detection with interrupt capability
•
Calibration register for storing the RTC calibration value
•
Possibility to output the RTC Calibration Clock, RTC Alarm pulse or Second pulse on
TAMPER pin PC13 (when this pin is not used for tamper detection)
64/709 RM0041 Rev 6
RM0041
when the
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