RM0041
10.6
Channel-by-channel programmable sample time
ADC samples the input voltage for a number of ADC_CLK cycles which can be modified us-
ing the SMP[2:0] bits in the ADC_SMPR1 and ADC_SMPR2 registers. Each channel can be
sampled with a different sample time.
The total conversion time is calculated as follows:
Tconv = Sampling time + 12.5 cycles
Example:
With an ADCCLK = 12 MHz and a sampling time of 1.5 cycles:
Tconv = 1.5 + 12.5 = 14 cycles = 1.17 µs
10.7
Conversion on external trigger
Conversion can be triggered by an external event (e.g. timer capture, EXTI line). If the EXT-
TRIG control bit is set then external events are able to trigger a conversion. The EXT-
SEL[2:0] and JEXTSEL[2:0] control bits allow the application to select decide which out of 8
possible events can trigger conversion for the regular and injected groups.
Note:
When an external trigger is selected for ADC regular or injected conversion, only the rising
edge of the signal can start the conversion.
TIM1_CC1 event
TIM1_CC2 event
TIM1_CC3 event
TIM2_CC2 event
TIM3_TRGO event
TIM4_CC4 event
EXTI line 11
SWSTART
TIM1_TRGO event
TIM1_CC4 event
TIM2_TRGO event
TIM2_CC1 event
TIM3_CC4 event
TIM4_TRGO event
EXTI line 15
JSWSTART
Table 59. External trigger for regular channels for ADC1
Source
Table 60. External trigger for injected channels for ADC1
Source
RM0041 Rev 6
Analog-to-digital converter (ADC)
Type
Internal signal from on-chip timers
External pin
Software control bit
Connection type
Internal signal from on-chip timers
External pin
Software control bit
EXTSEL[2:0]
000
001
010
011
100
101
110
111
JEXTSEL[2:0]
000
001
010
011
100
101
110
111
171/709
189
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